From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Aurelien Jarno" <aurelien@aurel32.net>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH-for-6.2 3/4] target/mips: Merge 32-bit/64-bit release6 decodetree definitions
Date: Mon, 2 Aug 2021 01:42:01 +0200 [thread overview]
Message-ID: <20210801234202.3167676-4-f4bug@amsat.org> (raw)
In-Reply-To: <20210801234202.3167676-1-f4bug@amsat.org>
We don't need to maintain 2 sets of decodetree definitions.
Merge them into a single file.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/mips64r6.decode | 27 -------------------
.../mips/tcg/{mips32r6.decode => rel6.decode} | 13 +++++++++
target/mips/tcg/rel6_translate.c | 16 ++++-------
target/mips/tcg/meson.build | 3 +--
4 files changed, 19 insertions(+), 40 deletions(-)
delete mode 100644 target/mips/tcg/mips64r6.decode
rename target/mips/tcg/{mips32r6.decode => rel6.decode} (69%)
diff --git a/target/mips/tcg/mips64r6.decode b/target/mips/tcg/mips64r6.decode
deleted file mode 100644
index b58d8009ccd..00000000000
--- a/target/mips/tcg/mips64r6.decode
+++ /dev/null
@@ -1,27 +0,0 @@
-# MIPS64 Release 6 instruction set
-#
-# Copyright (C) 2020 Philippe Mathieu-Daudé
-#
-# SPDX-License-Identifier: LGPL-2.1-or-later
-#
-# Reference:
-# MIPS Architecture for Programmers Volume II-A
-# The MIPS64 Instruction Set Reference Manual, Revision 6.06
-# (Document Number: MD00087-2B-MIPS64BIS-AFP-6.06)
-#
-
-&rtype rs rt rd sa !extern
-
-&REMOVED !extern
-
-@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
-
-DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
-
-REMOVED 011010 ----- ----- ---------------- # LDL
-REMOVED 011011 ----- ----- ---------------- # LDR
-REMOVED 101100 ----- ----- ---------------- # SDL
-REMOVED 101101 ----- ----- ---------------- # SDR
-
-REMOVED 110100 ----- ----- ---------------- # LLD
-REMOVED 111100 ----- ----- ---------------- # SCD
diff --git a/target/mips/tcg/mips32r6.decode b/target/mips/tcg/rel6.decode
similarity index 69%
rename from target/mips/tcg/mips32r6.decode
rename to target/mips/tcg/rel6.decode
index 837c991edc5..ed069c51662 100644
--- a/target/mips/tcg/mips32r6.decode
+++ b/target/mips/tcg/rel6.decode
@@ -5,21 +5,29 @@
# SPDX-License-Identifier: LGPL-2.1-or-later
#
# Reference:
+#
# MIPS Architecture for Programmers Volume II-A
# The MIPS32 Instruction Set Reference Manual, Revision 6.06
# (Document Number: MD00086-2B-MIPS32BIS-AFP-06.06)
#
+# MIPS Architecture for Programmers Volume II-A
+# The MIPS64 Instruction Set Reference Manual, Revision 6.06
+# (Document Number: MD00087-2B-MIPS64BIS-AFP-6.06)
&rtype rs rt rd sa
@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype
LSA 000000 ..... ..... ..... 000 .. 000101 @lsa
+DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa
REMOVED 010011 ----- ----- ----- ----- ------ # COP1X (COP3)
REMOVED 011100 ----- ----- ----- ----- ------ # SPECIAL2
+REMOVED 011010 ----- ----- ---------------- # LDL
+REMOVED 011011 ----- ----- ---------------- # LDR
+
REMOVED 011111 ----- ----- ---------- 011001 # LWLE
REMOVED 011111 ----- ----- ---------- 011010 # LWRE
REMOVED 011111 ----- ----- ---------- 100001 # SWLE
@@ -28,9 +36,14 @@ REMOVED 011111 ----- ----- ---------- 100010 # SWRE
REMOVED 100010 ----- ----- ---------------- # LWL
REMOVED 100110 ----- ----- ---------------- # LWR
REMOVED 101010 ----- ----- ---------------- # SWL
+REMOVED 101100 ----- ----- ---------------- # SDL
+REMOVED 101101 ----- ----- ---------------- # SDR
REMOVED 101110 ----- ----- ---------------- # SWR
REMOVED 101111 ----- ----- ---------------- # CACHE
+
REMOVED 110000 ----- ----- ---------------- # LL
REMOVED 110011 ----- ----- ---------------- # PREF
+REMOVED 110100 ----- ----- ---------------- # LLD
REMOVED 111000 ----- ----- ---------------- # SC
+REMOVED 111100 ----- ----- ---------------- # SCD
diff --git a/target/mips/tcg/rel6_translate.c b/target/mips/tcg/rel6_translate.c
index 0354370927d..ae2e023a817 100644
--- a/target/mips/tcg/rel6_translate.c
+++ b/target/mips/tcg/rel6_translate.c
@@ -13,9 +13,8 @@
#include "exec/helper-gen.h"
#include "translate.h"
-/* Include the auto-generated decoder. */
-#include "decode-mips32r6.c.inc"
-#include "decode-mips64r6.c.inc"
+/* Include the auto-generated decoders. */
+#include "decode-rel6.c.inc"
bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a)
{
@@ -31,13 +30,8 @@ static bool trans_LSA(DisasContext *ctx, arg_rtype *a)
static bool trans_DLSA(DisasContext *ctx, arg_rtype *a)
{
+ if (TARGET_LONG_BITS != 64) {
+ return false;
+ }
return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa);
}
-
-bool decode_isa_rel6(DisasContext *ctx, uint32_t insn)
-{
- if (TARGET_LONG_BITS == 64 && decode_mips64r6(ctx, insn)) {
- return true;
- }
- return decode_mips32r6(ctx, insn);
-}
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index bf4001e5741..70fa3dd57df 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -1,6 +1,5 @@
gen = [
- decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'),
- decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'),
+ decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']),
decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'),
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
]
--
2.31.1
next prev parent reply other threads:[~2021-08-01 23:47 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-01 23:41 [PATCH-for-6.2 0/4] target/mips: Decodetree housekeeping Philippe Mathieu-Daudé
2021-08-01 23:41 ` [PATCH-for-6.2 1/4] target/mips: Simpify PREF opcode Philippe Mathieu-Daudé
2021-08-02 19:07 ` Richard Henderson
2021-08-01 23:42 ` [PATCH-for-6.2 2/4] target/mips: Decode vendor extensions before MIPS ISAs Philippe Mathieu-Daudé
2021-08-02 19:08 ` Richard Henderson
2021-08-01 23:42 ` Philippe Mathieu-Daudé [this message]
2021-08-02 19:09 ` [PATCH-for-6.2 3/4] target/mips: Merge 32-bit/64-bit release6 decodetree definitions Richard Henderson
2021-08-01 23:42 ` [PATCH-for-6.2 4/4] target/mips: Rename 'rtype' as 'r' Philippe Mathieu-Daudé
2021-08-02 19:38 ` Richard Henderson
2021-08-06 20:51 ` [PATCH-for-6.2 0/4] target/mips: Decodetree housekeeping Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210801234202.3167676-4-f4bug@amsat.org \
--to=f4bug@amsat.org \
--cc=aleksandar.rikalo@syrmia.com \
--cc=aurelien@aurel32.net \
--cc=qemu-devel@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).