From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PATCH v2 25/55] trace/mem: Pass MemOpIdx to trace_mem_get_info
Date: Mon, 2 Aug 2021 18:14:13 -1000 [thread overview]
Message-ID: <20210803041443.55452-26-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210803041443.55452-1-richard.henderson@linaro.org>
We (will) often have the complete MemOpIdx handy, so use that.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
trace/mem.h | 32 +++++++++-----------------
accel/tcg/cputlb.c | 12 ++++------
accel/tcg/user-exec.c | 42 +++++++++++++++++++++++------------
tcg/tcg-op.c | 8 +++----
accel/tcg/atomic_common.c.inc | 6 ++---
5 files changed, 49 insertions(+), 51 deletions(-)
diff --git a/trace/mem.h b/trace/mem.h
index 2f27e7bdf0..699566c661 100644
--- a/trace/mem.h
+++ b/trace/mem.h
@@ -10,7 +10,7 @@
#ifndef TRACE__MEM_H
#define TRACE__MEM_H
-#include "tcg/tcg.h"
+#include "exec/memopidx.h"
#define TRACE_MEM_SZ_SHIFT_MASK 0xf /* size shift mask */
#define TRACE_MEM_SE (1ULL << 4) /* sign extended (y/n) */
@@ -19,45 +19,33 @@
#define TRACE_MEM_MMU_SHIFT 8 /* mmu idx */
/**
- * trace_mem_build_info:
+ * trace_mem_get_info:
*
* Return a value for the 'info' argument in guest memory access traces.
*/
-static inline uint16_t trace_mem_build_info(int size_shift, bool sign_extend,
- MemOp endianness, bool store,
- unsigned int mmu_idx)
+static inline uint16_t trace_mem_get_info(MemOpIdx oi, bool store)
{
+ MemOp op = get_memop(oi);
+ uint32_t size_shift = op & MO_SIZE;
+ bool sign_extend = op & MO_SIGN;
+ bool big_endian = (op & MO_BSWAP) == MO_BE;
uint16_t res;
res = size_shift & TRACE_MEM_SZ_SHIFT_MASK;
if (sign_extend) {
res |= TRACE_MEM_SE;
}
- if (endianness == MO_BE) {
+ if (big_endian) {
res |= TRACE_MEM_BE;
}
if (store) {
res |= TRACE_MEM_ST;
}
#ifdef CONFIG_SOFTMMU
- res |= mmu_idx << TRACE_MEM_MMU_SHIFT;
+ res |= get_mmuidx(oi) << TRACE_MEM_MMU_SHIFT;
#endif
+
return res;
}
-
-/**
- * trace_mem_get_info:
- *
- * Return a value for the 'info' argument in guest memory access traces.
- */
-static inline uint16_t trace_mem_get_info(MemOp op,
- unsigned int mmu_idx,
- bool store)
-{
- return trace_mem_build_info(op & MO_SIZE, !!(op & MO_SIGN),
- op & MO_BSWAP, store,
- mmu_idx);
-}
-
#endif /* TRACE__MEM_H */
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 2dfbc29a0c..c27658b8a2 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2103,14 +2103,12 @@ static inline uint64_t cpu_load_helper(CPUArchState *env, abi_ptr addr,
int mmu_idx, uintptr_t retaddr,
MemOp op, FullLoadHelper *full_load)
{
- uint16_t meminfo;
- MemOpIdx oi;
+ MemOpIdx oi = make_memop_idx(op, mmu_idx);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint64_t ret;
- meminfo = trace_mem_get_info(op, mmu_idx, false);
trace_guest_mem_before_exec(env_cpu(env), addr, meminfo);
- oi = make_memop_idx(op, mmu_idx);
ret = full_load(env, addr, oi, retaddr);
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, meminfo);
@@ -2542,13 +2540,11 @@ static inline void QEMU_ALWAYS_INLINE
cpu_store_helper(CPUArchState *env, target_ulong addr, uint64_t val,
int mmu_idx, uintptr_t retaddr, MemOp op)
{
- MemOpIdx oi;
- uint16_t meminfo;
+ MemOpIdx oi = make_memop_idx(op, mmu_idx);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
- meminfo = trace_mem_get_info(op, mmu_idx, true);
trace_guest_mem_before_exec(env_cpu(env), addr, meminfo);
- oi = make_memop_idx(op, mmu_idx);
store_helper(env, addr, val, oi, retaddr, op);
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, meminfo);
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index eab2b9804d..68d9c1b33d 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -855,8 +855,9 @@ int cpu_signal_handler(int host_signum, void *pinfo,
uint32_t cpu_ldub_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_UB, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint32_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_UB, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = ldub_p(g2h(env_cpu(env), ptr));
@@ -871,8 +872,9 @@ int cpu_ldsb_data(CPUArchState *env, abi_ptr ptr)
uint32_t cpu_lduw_be_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_BEUW, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint32_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_BEUW, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = lduw_be_p(g2h(env_cpu(env), ptr));
@@ -887,8 +889,9 @@ int cpu_ldsw_be_data(CPUArchState *env, abi_ptr ptr)
uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_BEUL, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint32_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_BEUL, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = ldl_be_p(g2h(env_cpu(env), ptr));
@@ -898,8 +901,9 @@ uint32_t cpu_ldl_be_data(CPUArchState *env, abi_ptr ptr)
uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_BEQ, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint64_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_BEQ, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = ldq_be_p(g2h(env_cpu(env), ptr));
@@ -909,8 +913,9 @@ uint64_t cpu_ldq_be_data(CPUArchState *env, abi_ptr ptr)
uint32_t cpu_lduw_le_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_LEUW, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint32_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_LEUW, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = lduw_le_p(g2h(env_cpu(env), ptr));
@@ -925,8 +930,9 @@ int cpu_ldsw_le_data(CPUArchState *env, abi_ptr ptr)
uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_LEUL, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint32_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_LEUL, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = ldl_le_p(g2h(env_cpu(env), ptr));
@@ -936,8 +942,9 @@ uint32_t cpu_ldl_le_data(CPUArchState *env, abi_ptr ptr)
uint64_t cpu_ldq_le_data(CPUArchState *env, abi_ptr ptr)
{
+ MemOpIdx oi = make_memop_idx(MO_LEQ, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, false);
uint64_t ret;
- uint16_t meminfo = trace_mem_get_info(MO_LEQ, MMU_USER_IDX, false);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
ret = ldq_le_p(g2h(env_cpu(env), ptr));
@@ -1032,7 +1039,8 @@ uint64_t cpu_ldq_le_data_ra(CPUArchState *env, abi_ptr ptr, uintptr_t retaddr)
void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_UB, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_UB, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stb_p(g2h(env_cpu(env), ptr), val);
@@ -1041,7 +1049,8 @@ void cpu_stb_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_BEUW, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_BEUW, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stw_be_p(g2h(env_cpu(env), ptr), val);
@@ -1050,7 +1059,8 @@ void cpu_stw_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_BEUL, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_BEUL, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stl_be_p(g2h(env_cpu(env), ptr), val);
@@ -1059,7 +1069,8 @@ void cpu_stl_be_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_BEQ, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_BEQ, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stq_be_p(g2h(env_cpu(env), ptr), val);
@@ -1068,7 +1079,8 @@ void cpu_stq_be_data(CPUArchState *env, abi_ptr ptr, uint64_t val)
void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_LEUW, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_LEUW, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stw_le_p(g2h(env_cpu(env), ptr), val);
@@ -1077,7 +1089,8 @@ void cpu_stw_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_LEUL, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_LEUL, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stl_le_p(g2h(env_cpu(env), ptr), val);
@@ -1086,7 +1099,8 @@ void cpu_stl_le_data(CPUArchState *env, abi_ptr ptr, uint32_t val)
void cpu_stq_le_data(CPUArchState *env, abi_ptr ptr, uint64_t val)
{
- uint16_t meminfo = trace_mem_get_info(MO_LEQ, MMU_USER_IDX, true);
+ MemOpIdx oi = make_memop_idx(MO_LEQ, MMU_USER_IDX);
+ uint16_t meminfo = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), ptr, meminfo);
stq_le_p(g2h(env_cpu(env), ptr), val);
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index e1490c372e..37b440af7f 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -2866,7 +2866,7 @@ static inline void plugin_gen_mem_callbacks(TCGv vaddr, uint16_t info)
void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
{
MemOp orig_memop;
- uint16_t info = trace_mem_get_info(memop, idx, 0);
+ uint16_t info = trace_mem_get_info(make_memop_idx(memop, idx), 0);
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
memop = tcg_canonicalize_memop(memop, 0, 0);
@@ -2904,7 +2904,7 @@ void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
{
TCGv_i32 swap = NULL;
- uint16_t info = trace_mem_get_info(memop, idx, 1);
+ uint16_t info = trace_mem_get_info(make_memop_idx(memop, idx), 1);
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
memop = tcg_canonicalize_memop(memop, 0, 1);
@@ -2956,7 +2956,7 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
memop = tcg_canonicalize_memop(memop, 1, 0);
- info = trace_mem_get_info(memop, idx, 0);
+ info = trace_mem_get_info(make_memop_idx(memop, idx), 0);
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, info);
orig_memop = memop;
@@ -3004,7 +3004,7 @@ void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
memop = tcg_canonicalize_memop(memop, 1, 1);
- info = trace_mem_get_info(memop, idx, 1);
+ info = trace_mem_get_info(make_memop_idx(memop, idx), 1);
trace_guest_mem_before_tcg(tcg_ctx->cpu, cpu_env, addr, info);
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
diff --git a/accel/tcg/atomic_common.c.inc b/accel/tcg/atomic_common.c.inc
index ebaa793464..6019a957b9 100644
--- a/accel/tcg/atomic_common.c.inc
+++ b/accel/tcg/atomic_common.c.inc
@@ -17,7 +17,7 @@ static uint16_t atomic_trace_rmw_pre(CPUArchState *env, target_ulong addr,
MemOpIdx oi)
{
CPUState *cpu = env_cpu(env);
- uint16_t info = trace_mem_get_info(get_memop(oi), get_mmuidx(oi), false);
+ uint16_t info = trace_mem_get_info(oi, false);
trace_guest_mem_before_exec(cpu, addr, info);
trace_guest_mem_before_exec(cpu, addr, info | TRACE_MEM_ST);
@@ -36,7 +36,7 @@ static void atomic_trace_rmw_post(CPUArchState *env, target_ulong addr,
static uint16_t atomic_trace_ld_pre(CPUArchState *env, target_ulong addr,
MemOpIdx oi)
{
- uint16_t info = trace_mem_get_info(get_memop(oi), get_mmuidx(oi), false);
+ uint16_t info = trace_mem_get_info(oi, false);
trace_guest_mem_before_exec(env_cpu(env), addr, info);
@@ -52,7 +52,7 @@ static void atomic_trace_ld_post(CPUArchState *env, target_ulong addr,
static uint16_t atomic_trace_st_pre(CPUArchState *env, target_ulong addr,
MemOpIdx oi)
{
- uint16_t info = trace_mem_get_info(get_memop(oi), get_mmuidx(oi), true);
+ uint16_t info = trace_mem_get_info(oi, true);
trace_guest_mem_before_exec(env_cpu(env), addr, info);
--
2.25.1
next prev parent reply other threads:[~2021-08-03 4:33 UTC|newest]
Thread overview: 85+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-03 4:13 [PATCH v2 00/55] Unaligned access for user-only Richard Henderson
2021-08-03 4:13 ` [PATCH v2 01/55] hw/core: Make do_unaligned_access noreturn Richard Henderson
2021-08-03 10:01 ` Philippe Mathieu-Daudé
2021-08-03 15:47 ` Alex Bennée
2021-08-03 18:02 ` Richard Henderson
2021-08-03 4:13 ` [PATCH v2 02/55] hw/core: Make do_unaligned_access available to user-only Richard Henderson
2021-08-03 9:59 ` Philippe Mathieu-Daudé
2021-08-03 15:51 ` Alex Bennée
2021-08-03 4:13 ` [PATCH v2 03/55] target/alpha: Implement do_unaligned_access for user-only Richard Henderson
2021-08-18 8:45 ` Philippe Mathieu-Daudé
2021-08-03 4:13 ` [PATCH v2 04/55] target/arm: " Richard Henderson
2021-08-03 4:13 ` [PATCH v2 05/55] target/hppa: " Richard Henderson
2021-08-18 8:46 ` Philippe Mathieu-Daudé
2021-08-03 4:13 ` [PATCH v2 06/55] target/microblaze: Do not set MO_ALIGN " Richard Henderson
2021-08-04 9:25 ` Edgar E. Iglesias
2021-08-03 4:13 ` [PATCH v2 07/55] target/mips: Implement do_unaligned_access " Richard Henderson
2021-08-19 19:33 ` Peter Maydell
2021-08-03 4:13 ` [PATCH v2 08/55] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-08-03 4:13 ` [PATCH v2 09/55] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-08-03 4:13 ` [PATCH v2 10/55] target/ppc: Implement do_unaligned_access for user-only Richard Henderson
2021-08-03 4:13 ` [PATCH v2 11/55] target/riscv: " Richard Henderson
2021-08-03 4:14 ` [PATCH v2 12/55] target/s390x: " Richard Henderson
2021-08-18 8:47 ` Philippe Mathieu-Daudé
2021-08-03 4:14 ` [PATCH v2 13/55] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-08-03 4:14 ` [PATCH v2 14/55] target/sh4: Implement do_unaligned_access for user-only Richard Henderson
2021-08-03 4:14 ` [PATCH v2 15/55] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-08-18 8:36 ` Mark Cave-Ayland
2021-08-03 4:14 ` [PATCH v2 16/55] target/sparc: Split out build_sfsr Richard Henderson
2021-08-18 8:38 ` Mark Cave-Ayland
2021-08-03 4:14 ` [PATCH v2 17/55] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-08-18 8:47 ` Mark Cave-Ayland
2021-08-03 4:14 ` [PATCH v2 18/55] target/sparc: Implement do_unaligned_access for user-only Richard Henderson
2021-08-18 8:48 ` Mark Cave-Ayland
2021-08-03 4:14 ` [PATCH v2 19/55] target/xtensa: " Richard Henderson
2021-08-03 5:38 ` Max Filippov
2021-08-18 8:48 ` Philippe Mathieu-Daudé
2021-08-03 4:14 ` [PATCH v2 20/55] accel/tcg: Report unaligned atomics " Richard Henderson
2021-08-03 15:54 ` Alex Bennée
2021-08-18 8:51 ` Philippe Mathieu-Daudé
2021-08-18 17:47 ` Richard Henderson
2021-08-03 4:14 ` [PATCH v2 21/55] accel/tcg: Drop signness in tracing in cputlb.c Richard Henderson
2021-08-03 15:58 ` Alex Bennée
2021-08-03 4:14 ` [PATCH v2 22/55] tcg: Expand MO_SIZE to 3 bits Richard Henderson
2021-08-03 4:14 ` [PATCH v2 23/55] tcg: Rename TCGMemOpIdx to MemOpIdx Richard Henderson
2021-08-03 4:14 ` [PATCH v2 24/55] tcg: Split out MemOpIdx to exec/memopidx.h Richard Henderson
2021-08-03 4:14 ` Richard Henderson [this message]
2021-08-03 4:14 ` [PATCH v2 26/55] accel/tcg: Pass MemOpIdx to atomic_trace_*_post Richard Henderson
2021-08-03 4:14 ` [PATCH v2 27/55] plugins: Reorg arguments to qemu_plugin_vcpu_mem_cb Richard Henderson
2021-08-03 4:14 ` [PATCH v2 28/55] trace: Split guest_mem_before Richard Henderson
2021-08-18 8:58 ` Philippe Mathieu-Daudé
2021-08-03 4:14 ` [PATCH v2 29/55] target/arm: Use MO_128 for 16 byte atomics Richard Henderson
2021-08-03 4:14 ` [PATCH v2 30/55] target/i386: " Richard Henderson
2021-08-18 8:59 ` Philippe Mathieu-Daudé
2021-08-03 4:14 ` [PATCH v2 31/55] target/ppc: " Richard Henderson
2021-08-03 4:14 ` [PATCH v2 32/55] target/s390x: " Richard Henderson
2021-08-03 4:14 ` [PATCH v2 33/55] target/hexagon: Implement cpu_mmu_index Richard Henderson
2021-08-03 4:14 ` [PATCH v2 34/55] accel/tcg: Add cpu_{ld,st}*_mmu interfaces Richard Henderson
2021-08-18 9:01 ` Philippe Mathieu-Daudé
2021-08-18 17:50 ` Richard Henderson
2021-08-03 4:14 ` [PATCH v2 35/55] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h Richard Henderson
2021-08-03 4:14 ` [PATCH v2 36/55] target/mips: Use cpu_*_data_ra for msa load/store Richard Henderson
2021-08-03 4:14 ` [PATCH v2 37/55] target/mips: Use 8-byte memory ops " Richard Henderson
2021-08-18 9:21 ` Philippe Mathieu-Daudé
2021-08-18 17:55 ` Richard Henderson
2021-08-03 4:14 ` [PATCH v2 38/55] target/s390x: Use cpu_*_mmu instead of helper_*_mmu Richard Henderson
2021-08-03 11:44 ` David Hildenbrand
2021-08-03 4:14 ` [PATCH v2 39/55] target/sparc: " Richard Henderson
2021-08-03 9:55 ` Philippe Mathieu-Daudé
2021-08-18 8:51 ` Mark Cave-Ayland
2021-08-03 4:14 ` [PATCH v2 40/55] target/arm: " Richard Henderson
2021-08-03 4:14 ` [PATCH v2 41/55] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h Richard Henderson
2021-08-03 4:14 ` [PATCH v2 42/55] tcg: Add helper_unaligned_mmu for user-only sigbus Richard Henderson
2021-08-03 4:14 ` [PATCH v2 43/55] tcg/i386: Support raising sigbus for user-only Richard Henderson
2021-08-03 4:14 ` [PATCH v2 44/55] tests/tcg/multiarch: Add sigbus.c Richard Henderson
2021-08-03 4:14 ` [PATCH v2 45/55] linux-user: Split out do_prctl and subroutines Richard Henderson
2021-08-03 4:14 ` [PATCH v2 46/55] linux-user: Disable more prctl subcodes Richard Henderson
2021-08-03 4:14 ` [PATCH v2 47/55] hw/core/cpu: Re-sort the non-pointers to the end of CPUClass Richard Henderson
2021-08-03 4:14 ` [PATCH v2 48/55] linux-user: Add code for PR_GET/SET_UNALIGN Richard Henderson
2021-08-03 4:14 ` [PATCH v2 49/55] hw/core/cpu: Move cpu properties to cpu-sysemu.c Richard Henderson
2021-08-03 4:14 ` [PATCH v2 50/55] hw/core/cpu: Add prctl-unalign-sigbus property for user-only Richard Henderson
2021-08-03 4:14 ` [PATCH v2 51/55] target/alpha: Reorg fp memory operations Richard Henderson
2021-08-03 4:14 ` [PATCH v2 52/55] target/alpha: Reorg integer " Richard Henderson
2021-08-03 4:14 ` [PATCH v2 53/55] target/alpha: Implement prctl_unalign_sigbus Richard Henderson
2021-08-03 4:14 ` [PATCH v2 54/55] target/hppa: " Richard Henderson
2021-08-03 4:14 ` [PATCH v2 55/55] target/sh4: " Richard Henderson
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