* [PATCH] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts
@ 2021-08-03 19:54 Ilya Leoshkevich
2021-08-03 21:14 ` Richard Henderson
0 siblings, 1 reply; 2+ messages in thread
From: Ilya Leoshkevich @ 2021-08-03 19:54 UTC (permalink / raw)
To: Riku Voipio, Richard Henderson, Paolo Bonzini
Cc: Christian Borntraeger, qemu-devel, Ilya Leoshkevich,
Andreas Krebbel
x86_64 dotnet/runtime uses cmpxchg for code patching. When running it
under s390x qemu-linux user, cpu_signal_handler() does not recognize
this as a write and does not restore PAGE_WRITE cleared by
tb_page_add(), incorrectly forwarding the signal to the guest code.
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
---
accel/tcg/user-exec.c | 37 ++++++++++++++++++++++++++++++++-----
1 file changed, 32 insertions(+), 5 deletions(-)
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index 90d1a2d327..587a0f1ef9 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -681,17 +681,24 @@ int cpu_signal_handler(int host_signum, void *pinfo,
pc = uc->uc_mcontext.psw.addr;
/* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
- of the normal 2 arguments. The 3rd argument contains the "int_code"
- from the hardware which does in fact contain the is_write value.
+ of the normal 2 arguments. The 4th argument contains the "Translation-
+ Exception Identification for DAT Exceptions" from the hardware (aka
+ "int_parm_long"), which does in fact contain the is_write value.
The rt signal handler, as far as I can tell, does not give this value
- at all. Not that we could get to it from here even if it were. */
- /* ??? This is not even close to complete, since it ignores all
- of the read-modify-write instructions. */
+ at all. Not that we could get to it from here even if it were.
+ So fall back to parsing instructions. Treat read-modify-write ones as
+ writes, which is not fully correct, but for tracking self-modifying code
+ this is better than treating them as reads. Checking si_addr page flags
+ might be a viable improvement, albeit a racy one. */
+ /* ??? This is not even close to complete. */
pinsn = (uint16_t *)pc;
switch (pinsn[0] >> 8) {
case 0x50: /* ST */
case 0x42: /* STC */
case 0x40: /* STH */
+ case 0xba: /* CS */
+ case 0xbb: /* CDS */
+ case 0xc8: /* CSST */
is_write = 1;
break;
case 0xc4: /* RIL format insns */
@@ -715,7 +722,27 @@ int cpu_signal_handler(int host_signum, void *pinfo,
is_write = 1;
}
break;
+ case 0xeb: /* RSY format insns */
+ switch (pinsn[2] & 0xff) {
+ case 0x14: /* CSY */
+ case 0x30: /* CSG */
+ case 0x31: /* CDSY */
+ case 0x3e: /* CDSG */
+ case 0xe4: /* LANG */
+ case 0xe6: /* LAOG */
+ case 0xe7: /* LAXG */
+ case 0xe8: /* LAAG */
+ case 0xea: /* LAALG */
+ case 0xf4: /* LAN */
+ case 0xf6: /* LAO */
+ case 0xf7: /* LAX */
+ case 0xfa: /* LAAL */
+ case 0xf8: /* LAA */
+ is_write = 1;
+ }
+ break;
}
+
return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask);
}
--
2.31.1
^ permalink raw reply related [flat|nested] 2+ messages in thread* Re: [PATCH] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts
2021-08-03 19:54 [PATCH] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts Ilya Leoshkevich
@ 2021-08-03 21:14 ` Richard Henderson
0 siblings, 0 replies; 2+ messages in thread
From: Richard Henderson @ 2021-08-03 21:14 UTC (permalink / raw)
To: Ilya Leoshkevich, Riku Voipio, Paolo Bonzini
Cc: Christian Borntraeger, qemu-devel, Andreas Krebbel
On 8/3/21 9:54 AM, Ilya Leoshkevich wrote:
> /* ??? On linux, the non-rt signal handler has 4 (!) arguments instead
> - of the normal 2 arguments. The 3rd argument contains the "int_code"
> - from the hardware which does in fact contain the is_write value.
> + of the normal 2 arguments. The 4th argument contains the "Translation-
> + Exception Identification for DAT Exceptions" from the hardware (aka
> + "int_parm_long"), which does in fact contain the is_write value.
> The rt signal handler, as far as I can tell, does not give this value
> - at all. Not that we could get to it from here even if it were. */
> - /* ??? This is not even close to complete, since it ignores all
> - of the read-modify-write instructions. */
> + at all. Not that we could get to it from here even if it were.
> + So fall back to parsing instructions. Treat read-modify-write ones as
> + writes, which is not fully correct, but for tracking self-modifying code
> + this is better than treating them as reads. Checking si_addr page flags
> + might be a viable improvement, albeit a racy one. */
> + /* ??? This is not even close to complete. */
You should have gotten a checkpatch warning here.
Just convert the comment to
/*
* this style
*/
> pinsn = (uint16_t *)pc;
> switch (pinsn[0] >> 8) {
> case 0x50: /* ST */
> case 0x42: /* STC */
> case 0x40: /* STH */
> + case 0xba: /* CS */
> + case 0xbb: /* CDS */
> + case 0xc8: /* CSST */
CSST is format SSF; you're not checking enough bits to distinguish from LOAD PAIR DISJOINT.
Otherwise, looks good.
r~
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