From: Yanan Wang <wangyanan55@huawei.com>
To: Peter Maydell <peter.maydell@linaro.org>,
Andrew Jones <drjones@redhat.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
Igor Mammedov <imammedo@redhat.com>
Cc: Salil Mehta <salil.mehta@huawei.com>,
qemu-devel@nongnu.org, Yanan Wang <wangyanan55@huawei.com>,
Shannon Zhao <shannon.zhaosl@gmail.com>,
qemu-arm@nongnu.org, Alistair Francis <alistair.francis@wdc.com>,
wanghaibin.wang@huawei.com,
David Gibson <david@gibson.dropbear.id.au>
Subject: [PATCH for-6.2 v5 3/5] hw/arm/virt: Add cpu-map to device tree
Date: Thu, 5 Aug 2021 20:39:19 +0800 [thread overview]
Message-ID: <20210805123921.62540-4-wangyanan55@huawei.com> (raw)
In-Reply-To: <20210805123921.62540-1-wangyanan55@huawei.com>
From: Andrew Jones <drjones@redhat.com>
Support device tree CPU topology descriptions.
In accordance with the Devicetree Specification, the Linux Doc
"arm/cpus.yaml" requires that cpus and cpu nodes in the DT are
present. And we have already met the requirement by generating
/cpus/cpu@* nodes for members within ms->smp.cpus. Accordingly,
we should also create subnodes in cpu-map for the present cpus,
each of which relates to an unique cpu node.
The Linux Doc "cpu/cpu-topology.txt" states that the hierarchy
of CPUs in a SMP system is defined through four entities and
they are socket/cluster/core/thread. It is also required that
a socket node's child nodes must be one or more cluster nodes.
Given that currently we are only provided with information of
socket/core/thread, we assume there is one cluster child node
in each socket node when creating cpu-map.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Co-developed-by: Yanan Wang <wangyanan55@huawei.com>
Signed-off-by: Yanan Wang <wangyanan55@huawei.com>
---
hw/arm/virt.c | 59 ++++++++++++++++++++++++++++++++++++++++++---------
1 file changed, 49 insertions(+), 10 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 82f2eba6bd..d1e294be95 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -350,20 +350,21 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
int cpu;
int addr_cells = 1;
const MachineState *ms = MACHINE(vms);
+ const VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);
int smp_cpus = ms->smp.cpus;
/*
- * From Documentation/devicetree/bindings/arm/cpus.txt
- * On ARM v8 64-bit systems value should be set to 2,
- * that corresponds to the MPIDR_EL1 register size.
- * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
- * in the system, #address-cells can be set to 1, since
- * MPIDR_EL1[63:32] bits are not used for CPUs
- * identification.
+ * See Linux Documentation/devicetree/bindings/arm/cpus.yaml
+ * On ARM v8 64-bit systems value should be set to 2,
+ * that corresponds to the MPIDR_EL1 register size.
+ * If MPIDR_EL1[63:32] value is equal to 0 on all CPUs
+ * in the system, #address-cells can be set to 1, since
+ * MPIDR_EL1[63:32] bits are not used for CPUs
+ * identification.
*
- * Here we actually don't know whether our system is 32- or 64-bit one.
- * The simplest way to go is to examine affinity IDs of all our CPUs. If
- * at least one of them has Aff3 populated, we set #address-cells to 2.
+ * Here we actually don't know whether our system is 32- or 64-bit one.
+ * The simplest way to go is to examine affinity IDs of all our CPUs. If
+ * at least one of them has Aff3 populated, we set #address-cells to 2.
*/
for (cpu = 0; cpu < smp_cpus; cpu++) {
ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu));
@@ -406,8 +407,46 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms)
ms->possible_cpus->cpus[cs->cpu_index].props.node_id);
}
+ if (!vmc->no_cpu_topology) {
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
+ qemu_fdt_alloc_phandle(ms->fdt));
+ }
+
g_free(nodename);
}
+
+ if (!vmc->no_cpu_topology) {
+ /*
+ * See Linux Documentation/devicetree/bindings/cpu/cpu-topology.txt
+ * In a SMP system, the hierarchy of CPUs is defined through four
+ * entities that are used to describe the layout of physical CPUs
+ * in the system: socket/cluster/core/thread.
+ */
+ qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
+
+ for (cpu = smp_cpus - 1; cpu >= 0; cpu--) {
+ char *cpu_path = g_strdup_printf("/cpus/cpu@%d", cpu);
+ char *map_path;
+
+ if (ms->smp.threads > 1) {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster0/core%d/thread%d",
+ cpu / (ms->smp.cores * ms->smp.threads),
+ (cpu / ms->smp.threads) % ms->smp.cores,
+ cpu % ms->smp.threads);
+ } else {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/cluster0/core%d",
+ cpu / ms->smp.cores,
+ cpu % ms->smp.cores);
+ }
+ qemu_fdt_add_path(ms->fdt, map_path);
+ qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
+
+ g_free(map_path);
+ g_free(cpu_path);
+ }
+ }
}
static void fdt_add_its_gic_node(VirtMachineState *vms)
--
2.19.1
next prev parent reply other threads:[~2021-08-05 12:44 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-05 12:39 [PATCH for-6.2 v5 0/5] hw/arm/virt: Introduce cpu topology support Yanan Wang
2021-08-05 12:39 ` [PATCH v5 1/5] hw/arm/virt: Only describe cpu topology to guest since virt 6.2 Yanan Wang
2021-08-05 12:39 ` [PATCH for-6.2 v5 2/5] device_tree: Add qemu_fdt_add_path Yanan Wang
2021-08-05 12:39 ` Yanan Wang [this message]
2021-08-17 2:10 ` [PATCH for-6.2 v5 3/5] hw/arm/virt: Add cpu-map to device tree wangyanan (Y)
2021-08-17 11:51 ` Andrew Jones
2021-08-17 13:54 ` wangyanan (Y)
2021-08-05 12:39 ` [PATCH for-6.2 v5 4/5] hw/acpi/aml-build: Add Processor hierarchy node structure Yanan Wang
2021-08-05 12:39 ` [PATCH for-6.2 v5 5/5] hw/acpi/aml-build: Generate PPTT table Yanan Wang
2021-08-23 23:52 ` Michael S. Tsirkin
2021-08-24 3:19 ` wangyanan (Y)
2021-08-23 23:53 ` [PATCH for-6.2 v5 0/5] hw/arm/virt: Introduce cpu topology support Michael S. Tsirkin
2021-08-24 3:19 ` wangyanan (Y)
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