From: LIU Zhiwei <zhiwei_liu@c-sky.com>
To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: palmer@dabbelt.com, bin.meng@windriver.com,
Alistair.Francis@wdc.com, LIU Zhiwei <zhiwei_liu@c-sky.com>
Subject: [PATCH] target/riscv: Add User CSRs read-only check
Date: Mon, 9 Aug 2021 15:07:27 +0800 [thread overview]
Message-ID: <20210809070727.9245-1-zhiwei_liu@c-sky.com> (raw)
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
target/riscv/csr.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 9a4ed18ac5..ea62d9e653 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -1422,11 +1422,11 @@ RISCVException riscv_csrrw(CPURISCVState *env, int csrno,
RISCVException ret;
target_ulong old_value;
RISCVCPU *cpu = env_archcpu(env);
+ int read_only = get_field(csrno, 0xC00) == 3;
/* check privileges and return -1 if check fails */
#if !defined(CONFIG_USER_ONLY)
int effective_priv = env->priv;
- int read_only = get_field(csrno, 0xC00) == 3;
if (riscv_has_ext(env, RVH) &&
env->priv == PRV_S &&
@@ -1443,6 +1443,10 @@ RISCVException riscv_csrrw(CPURISCVState *env, int csrno,
(!env->debugger && (effective_priv < get_field(csrno, 0x300)))) {
return RISCV_EXCP_ILLEGAL_INST;
}
+#else
+ if (write_mask && read_only) {
+ return -RISCV_EXCP_ILLEGAL_INST;
+ }
#endif
/* ensure the CSR extension is enabled. */
--
2.17.1
next reply other threads:[~2021-08-09 7:10 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-09 7:07 LIU Zhiwei [this message]
2021-08-09 9:35 ` [PATCH] target/riscv: Add User CSRs read-only check Bin Meng
2021-08-09 9:43 ` LIU Zhiwei
2021-08-09 9:49 ` Bin Meng
-- strict thread matches above, loose matches on Subject: below --
2021-08-09 10:32 LIU Zhiwei
2021-08-09 10:39 ` Bin Meng
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