From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Huacai Chen" <chenhuacai@kernel.org>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH 0/2] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr
Date: Fri, 13 Aug 2021 13:01:47 +0200 [thread overview]
Message-ID: <20210813110149.1432692-1-f4bug@amsat.org> (raw)
Raise Loongson-3A1000 SEGBITS from 40 to 48.
Philippe Mathieu-Daudé (2):
target/mips: Document Loongson-3A CPU definitions
target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr
target/mips/cpu-defs.c.inc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--
2.31.1
next reply other threads:[~2021-08-13 11:03 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-13 11:01 Philippe Mathieu-Daudé [this message]
2021-08-13 11:01 ` [PATCH 1/2] target/mips: Document Loongson-3A CPU definitions Philippe Mathieu-Daudé
2021-08-14 2:40 ` Huacai Chen
2021-08-13 11:01 ` [PATCH 2/2] target/mips: Allow Loongson 3A1000 to use up to 48-bit VAddr Philippe Mathieu-Daudé
2021-08-14 2:40 ` Huacai Chen
2021-08-25 10:50 ` [PATCH 0/2] " Philippe Mathieu-Daudé
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