[PATCH 0/8] target/mips: Housekeeping in gen_helper() macros

[PATCH 0/8] target/mips: Housekeeping in gen_helper() macros

[Philippe Mathieu-Daudé]

Trivial patches:
- Remove unused macros
- Use tcg_constant_i32()
- Inline the macros when few uses
- Move macro definitions in translate.h

Philippe Mathieu-Daudé (8):
  target/mips: Remove gen_helper_0e3i()
  target/mips: Remove gen_helper_1e2i()
  target/mips: Use tcg_constant_i32() in gen_helper_0e2i()
  target/mips: Simplify gen_helper() macros by using tcg_constant_i32()
  target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros
  target/mips: Inline gen_helper_0e0i()
  target/mips: Use tcg_constant_i32() in generate_exception_err()
  target/mips: Define gen_helper() macros in translate.h

 target/mips/tcg/translate.h | 12 +++++++
 target/mips/tcg/translate.c | 69 ++++---------------------------------
 2 files changed, 19 insertions(+), 62 deletions(-)

-- 
2.31.1

[PATCH 1/8] target/mips: Remove gen_helper_0e3i()

[Philippe Mathieu-Daudé]

gen_helper_0e3i() is unused since commit 895c2d04359
("target-mips: switch to AREG0 free mode"), remove it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index a58d50e40e2..c0f8a04b472 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1249,12 +1249,6 @@ TCGv_i64 fpu_f64[32];
     tcg_temp_free_i32(helper_tmp);                                \
     } while (0)
 
-#define gen_helper_0e3i(name, arg1, arg2, arg3, arg4) do {        \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg4);                    \
-    gen_helper_##name(cpu_env, arg1, arg2, arg3, helper_tmp);     \
-    tcg_temp_free_i32(helper_tmp);                                \
-    } while (0)
-
 #define DISAS_STOP       DISAS_TARGET_0
 #define DISAS_EXIT       DISAS_TARGET_1
 
-- 
2.31.1

[PATCH 2/8] target/mips: Remove gen_helper_1e2i()

[Philippe Mathieu-Daudé]

gen_helper_1e2i() is unused since commit 33a07fa2db6
("target/mips: reimplement SC instruction emulation
and use cmpxchg"), remove it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index c0f8a04b472..4b689a54abb 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1243,12 +1243,6 @@ TCGv_i64 fpu_f64[32];
     tcg_temp_free_i32(helper_tmp);                                \
     } while (0)
 
-#define gen_helper_1e2i(name, ret, arg1, arg2, arg3) do {         \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg3);                    \
-    gen_helper_##name(ret, cpu_env, arg1, arg2, helper_tmp);      \
-    tcg_temp_free_i32(helper_tmp);                                \
-    } while (0)
-
 #define DISAS_STOP       DISAS_TARGET_0
 #define DISAS_EXIT       DISAS_TARGET_1
 
-- 
2.31.1

[PATCH 3/8] target/mips: Use tcg_constant_i32() in gen_helper_0e2i()

[Philippe Mathieu-Daudé]

$rt register is used read-only, so we can replace tcg_const_i32()
temporary by tcg_constant_i32().

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 14 ++------------
 1 file changed, 2 insertions(+), 12 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 4b689a54abb..a6df9beb670 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -9072,12 +9072,7 @@ static void gen_mttr(CPUMIPSState *env, DisasContext *ctx, int rd, int rt,
             break;
         case 3:
             /* XXX: For now we support only a single FPU context. */
-            {
-                TCGv_i32 fs_tmp = tcg_const_i32(rd);
-
-                gen_helper_0e2i(ctc1, t0, fs_tmp, rt);
-                tcg_temp_free_i32(fs_tmp);
-            }
+            gen_helper_0e2i(ctc1, t0, tcg_constant_i32(rd), rt);
             /* Stop translation as we may have changed hflags */
             ctx->base.is_jmp = DISAS_STOP;
             break;
@@ -9694,12 +9689,7 @@ static void gen_cp1(DisasContext *ctx, uint32_t opc, int rt, int fs)
     case OPC_CTC1:
         gen_load_gpr(t0, rt);
         save_cpu_state(ctx, 0);
-        {
-            TCGv_i32 fs_tmp = tcg_const_i32(fs);
-
-            gen_helper_0e2i(ctc1, t0, fs_tmp, rt);
-            tcg_temp_free_i32(fs_tmp);
-        }
+        gen_helper_0e2i(ctc1, t0, tcg_constant_i32(fs), rt);
         /* Stop translation as we may have changed hflags */
         ctx->base.is_jmp = DISAS_STOP;
         break;
-- 
2.31.1

[PATCH 4/8] target/mips: Simplify gen_helper() macros by using tcg_constant_i32()

[Philippe Mathieu-Daudé]

In all call sites the last argument is always used as a
read-only value, so we can replace tcg_const_i32() temporary
by tcg_constant_i32().

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 20 +++++---------------
 1 file changed, 5 insertions(+), 15 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index a6df9beb670..3417fc433ff 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1214,33 +1214,23 @@ TCGv_i64 fpu_f64[32];
 #include "exec/gen-icount.h"
 
 #define gen_helper_0e0i(name, arg) do {                           \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg);                     \
-    gen_helper_##name(cpu_env, helper_tmp);                       \
-    tcg_temp_free_i32(helper_tmp);                                \
+    gen_helper_##name(cpu_env, tcg_constant_i32(arg));            \
     } while (0)
 
 #define gen_helper_0e1i(name, arg1, arg2) do {                    \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg2);                    \
-    gen_helper_##name(cpu_env, arg1, helper_tmp);                 \
-    tcg_temp_free_i32(helper_tmp);                                \
+    gen_helper_##name(cpu_env, arg1, tcg_constant_i32(arg2));     \
     } while (0)
 
 #define gen_helper_1e0i(name, ret, arg1) do {                     \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg1);                    \
-    gen_helper_##name(ret, cpu_env, helper_tmp);                  \
-    tcg_temp_free_i32(helper_tmp);                                \
+    gen_helper_##name(ret, cpu_env, tcg_constant_i32(arg1));      \
     } while (0)
 
 #define gen_helper_1e1i(name, ret, arg1, arg2) do {               \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg2);                    \
-    gen_helper_##name(ret, cpu_env, arg1, helper_tmp);            \
-    tcg_temp_free_i32(helper_tmp);                                \
+    gen_helper_##name(ret, cpu_env, arg1, tcg_constant_i32(arg2));\
     } while (0)
 
 #define gen_helper_0e2i(name, arg1, arg2, arg3) do {              \
-    TCGv_i32 helper_tmp = tcg_const_i32(arg3);                    \
-    gen_helper_##name(cpu_env, arg1, arg2, helper_tmp);           \
-    tcg_temp_free_i32(helper_tmp);                                \
+    gen_helper_##name(cpu_env, arg1, arg2, tcg_constant_i32(arg3));\
     } while (0)
 
 #define DISAS_STOP       DISAS_TARGET_0
-- 
2.31.1

[PATCH 5/8] target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros

[Philippe Mathieu-Daudé]

gen_helper_1e1i() is one-line long and is used in one place:
simply inline it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 3417fc433ff..db7fc75d937 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1225,10 +1225,6 @@ TCGv_i64 fpu_f64[32];
     gen_helper_##name(ret, cpu_env, tcg_constant_i32(arg1));      \
     } while (0)
 
-#define gen_helper_1e1i(name, ret, arg1, arg2) do {               \
-    gen_helper_##name(ret, cpu_env, arg1, tcg_constant_i32(arg2));\
-    } while (0)
-
 #define gen_helper_0e2i(name, arg1, arg2, arg3) do {              \
     gen_helper_##name(cpu_env, arg1, arg2, tcg_constant_i32(arg3));\
     } while (0)
@@ -1991,7 +1987,7 @@ static inline void op_ld_##insn(TCGv ret, TCGv arg1, int mem_idx,          \
 static inline void op_ld_##insn(TCGv ret, TCGv arg1, int mem_idx,          \
                                 DisasContext *ctx)                         \
 {                                                                          \
-    gen_helper_1e1i(insn, ret, arg1, mem_idx);                             \
+    gen_helper_##insn(ret, cpu_env, arg1, tcg_constant_i32(mem_idx));      \
 }
 #endif
 OP_LD_ATOMIC(ll, ld32s);
-- 
2.31.1

[PATCH 6/8] target/mips: Inline gen_helper_0e0i()

[Philippe Mathieu-Daudé]

gen_helper_0e0i() is one-line long and is only used twice:
simply inline it.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index db7fc75d937..c515a337ebc 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1213,10 +1213,6 @@ TCGv_i64 fpu_f64[32];
 
 #include "exec/gen-icount.h"
 
-#define gen_helper_0e0i(name, arg) do {                           \
-    gen_helper_##name(cpu_env, tcg_constant_i32(arg));            \
-    } while (0)
-
 #define gen_helper_0e1i(name, arg1, arg2) do {                    \
     gen_helper_##name(cpu_env, arg1, tcg_constant_i32(arg2));     \
     } while (0)
@@ -1378,7 +1374,7 @@ void generate_exception_err(DisasContext *ctx, int excp, int err)
 
 void generate_exception(DisasContext *ctx, int excp)
 {
-    gen_helper_0e0i(raise_exception, excp);
+    gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp));
 }
 
 void generate_exception_end(DisasContext *ctx, int excp)
@@ -14188,7 +14184,7 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
         MIPS_INVAL("PMON / selsl");
         gen_reserved_instruction(ctx);
 #else
-        gen_helper_0e0i(pmon, sa);
+        gen_helper_pmon(cpu_env, tcg_constant_i32(sa));
 #endif
         break;
     case OPC_SYSCALL:
-- 
2.31.1

[PATCH 7/8] target/mips: Use tcg_constant_i32() in generate_exception_err()

[Philippe Mathieu-Daudé]

excp/err are temporaries input, so we can replace tcg_const_i32()
calls by tcg_constant_i32() equivalent.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index c515a337ebc..93b72c994f2 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1363,12 +1363,9 @@ static inline void restore_cpu_state(CPUMIPSState *env, DisasContext *ctx)
 
 void generate_exception_err(DisasContext *ctx, int excp, int err)
 {
-    TCGv_i32 texcp = tcg_const_i32(excp);
-    TCGv_i32 terr = tcg_const_i32(err);
     save_cpu_state(ctx, 1);
-    gen_helper_raise_exception_err(cpu_env, texcp, terr);
-    tcg_temp_free_i32(terr);
-    tcg_temp_free_i32(texcp);
+    gen_helper_raise_exception_err(cpu_env, tcg_constant_i32(excp),
+                                   tcg_constant_i32(err));
     ctx->base.is_jmp = DISAS_NORETURN;
 }
 
-- 
2.31.1

[PATCH 8/8] target/mips: Define gen_helper() macros in translate.h

[Philippe Mathieu-Daudé]

To be able to split some code calling the gen_helper() macros
out of the huge translate.c, we need to define them in the
'translate.h' local header.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
Will be used in following series. Can resend there as first
patch.
---
 target/mips/tcg/translate.h | 12 ++++++++++++
 target/mips/tcg/translate.c | 12 ------------
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index bb0a6b8d74f..eac01a81182 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -113,6 +113,18 @@ enum {
     OPC_BC1TANY4     = (0x01 << 16) | OPC_BC1ANY4,
 };
 
+#define gen_helper_0e1i(name, arg1, arg2) do { \
+    gen_helper_##name(cpu_env, arg1, tcg_constant_i32(arg2)); \
+    } while (0)
+
+#define gen_helper_1e0i(name, ret, arg1) do { \
+    gen_helper_##name(ret, cpu_env, tcg_constant_i32(arg1)); \
+    } while (0)
+
+#define gen_helper_0e2i(name, arg1, arg2, arg3) do { \
+    gen_helper_##name(cpu_env, arg1, arg2, tcg_constant_i32(arg3));\
+    } while (0)
+
 void generate_exception(DisasContext *ctx, int excp);
 void generate_exception_err(DisasContext *ctx, int excp, int err);
 void generate_exception_end(DisasContext *ctx, int excp);
diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 93b72c994f2..40cb1fc9508 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -1213,18 +1213,6 @@ TCGv_i64 fpu_f64[32];
 
 #include "exec/gen-icount.h"
 
-#define gen_helper_0e1i(name, arg1, arg2) do {                    \
-    gen_helper_##name(cpu_env, arg1, tcg_constant_i32(arg2));     \
-    } while (0)
-
-#define gen_helper_1e0i(name, ret, arg1) do {                     \
-    gen_helper_##name(ret, cpu_env, tcg_constant_i32(arg1));      \
-    } while (0)
-
-#define gen_helper_0e2i(name, arg1, arg2, arg3) do {              \
-    gen_helper_##name(cpu_env, arg1, arg2, tcg_constant_i32(arg3));\
-    } while (0)
-
 #define DISAS_STOP       DISAS_TARGET_0
 #define DISAS_EXIT       DISAS_TARGET_1
 
-- 
2.31.1

Re: [PATCH 0/8] target/mips: Housekeeping in gen_helper() macros

[Richard Henderson]

On 8/16/21 10:50 AM, Philippe Mathieu-Daudé wrote:
> Trivial patches:
> - Remove unused macros
> - Use tcg_constant_i32()
> - Inline the macros when few uses
> - Move macro definitions in translate.h
> 
> Philippe Mathieu-Daudé (8):
>    target/mips: Remove gen_helper_0e3i()
>    target/mips: Remove gen_helper_1e2i()
>    target/mips: Use tcg_constant_i32() in gen_helper_0e2i()
>    target/mips: Simplify gen_helper() macros by using tcg_constant_i32()
>    target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros
>    target/mips: Inline gen_helper_0e0i()
>    target/mips: Use tcg_constant_i32() in generate_exception_err()
>    target/mips: Define gen_helper() macros in translate.h

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~

Re: [PATCH 0/8] target/mips: Housekeeping in gen_helper() macros

[Philippe Mathieu-Daudé]

On 8/17/21 4:52 PM, Richard Henderson wrote:
> On 8/16/21 10:50 AM, Philippe Mathieu-Daudé wrote:
>> Trivial patches:
>> - Remove unused macros
>> - Use tcg_constant_i32()
>> - Inline the macros when few uses
>> - Move macro definitions in translate.h
>>
>> Philippe Mathieu-Daudé (8):
>>    target/mips: Remove gen_helper_0e3i()
>>    target/mips: Remove gen_helper_1e2i()
>>    target/mips: Use tcg_constant_i32() in gen_helper_0e2i()
>>    target/mips: Simplify gen_helper() macros by using tcg_constant_i32()
>>    target/mips: Inline gen_helper_1e1i() call in op_ld_INSN() macros
>>    target/mips: Inline gen_helper_0e0i()
>>    target/mips: Use tcg_constant_i32() in generate_exception_err()
>>    target/mips: Define gen_helper() macros in translate.h
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Thanks, series applied to mips-next.