From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Thomas Huth" <thuth@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Aleksandar Rikalo" <aleksandar.rikalo@syrmia.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Aurelien Jarno" <aurelien@aurel32.net>
Subject: [PATCH 3/5] target/mips: Replace GET_LMASK64() macro by get_lmask(64) function
Date: Wed, 18 Aug 2021 18:43:19 +0200 [thread overview]
Message-ID: <20210818164321.2474534-4-f4bug@amsat.org> (raw)
In-Reply-To: <20210818164321.2474534-1-f4bug@amsat.org>
The target endianess information is stored in the BigEndian
bit of the Config0 register in CP0.
Replace the GET_LMASK() macro by an inlined get_lmask() function,
passing CPUMIPSState and the word size as argument.
We can remove another use of the TARGET_WORDS_BIGENDIAN definition.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
target/mips/tcg/ldst_helper.c | 33 ++++++++++++++-------------------
1 file changed, 14 insertions(+), 19 deletions(-)
diff --git a/target/mips/tcg/ldst_helper.c b/target/mips/tcg/ldst_helper.c
index 888578c0b9c..01b3dc5bee0 100644
--- a/target/mips/tcg/ldst_helper.c
+++ b/target/mips/tcg/ldst_helper.c
@@ -128,48 +128,43 @@ void helper_swr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
* "half" load and stores. We must do the memory access inline,
* or fault handling won't work.
*/
-#ifdef TARGET_WORDS_BIGENDIAN
-#define GET_LMASK64(v) ((v) & 7)
-#else
-#define GET_LMASK64(v) (((v) & 7) ^ 7)
-#endif
void helper_sdl(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
int mem_idx)
{
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)(arg1 >> 56), mem_idx, GETPC());
- if (GET_LMASK64(arg2) <= 6) {
+ if (get_lmask(env, arg2, 64) <= 6) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 1), (uint8_t)(arg1 >> 48),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 5) {
+ if (get_lmask(env, arg2, 64) <= 5) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 2), (uint8_t)(arg1 >> 40),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 4) {
+ if (get_lmask(env, arg2, 64) <= 4) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 3), (uint8_t)(arg1 >> 32),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 3) {
+ if (get_lmask(env, arg2, 64) <= 3) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 4), (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 2) {
+ if (get_lmask(env, arg2, 64) <= 2) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 5), (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 1) {
+ if (get_lmask(env, arg2, 64) <= 1) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 6), (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) <= 0) {
+ if (get_lmask(env, arg2, 64) <= 0) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, 7), (uint8_t)arg1,
mem_idx, GETPC());
}
@@ -180,37 +175,37 @@ void helper_sdr(CPUMIPSState *env, target_ulong arg1, target_ulong arg2,
{
cpu_stb_mmuidx_ra(env, arg2, (uint8_t)arg1, mem_idx, GETPC());
- if (GET_LMASK64(arg2) >= 1) {
+ if (get_lmask(env, arg2, 64) >= 1) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -1), (uint8_t)(arg1 >> 8),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 2) {
+ if (get_lmask(env, arg2, 64) >= 2) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -2), (uint8_t)(arg1 >> 16),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 3) {
+ if (get_lmask(env, arg2, 64) >= 3) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -3), (uint8_t)(arg1 >> 24),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 4) {
+ if (get_lmask(env, arg2, 64) >= 4) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -4), (uint8_t)(arg1 >> 32),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 5) {
+ if (get_lmask(env, arg2, 64) >= 5) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -5), (uint8_t)(arg1 >> 40),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) >= 6) {
+ if (get_lmask(env, arg2, 64) >= 6) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -6), (uint8_t)(arg1 >> 48),
mem_idx, GETPC());
}
- if (GET_LMASK64(arg2) == 7) {
+ if (get_lmask(env, arg2, 64) == 7) {
cpu_stb_mmuidx_ra(env, get_offset(env, arg2, -7), (uint8_t)(arg1 >> 56),
mem_idx, GETPC());
}
--
2.31.1
next prev parent reply other threads:[~2021-08-18 16:47 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-18 16:43 [PATCH 0/5] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() Philippe Mathieu-Daudé
2021-08-18 16:43 ` [PATCH 1/5] target/mips: Replace GET_OFFSET() macro by get_offset() function Philippe Mathieu-Daudé
2021-08-18 16:56 ` Richard Henderson
2021-08-18 21:31 ` Philippe Mathieu-Daudé
2021-08-18 22:29 ` Richard Henderson
2021-08-18 16:43 ` [PATCH 2/5] target/mips: Replace GET_LMASK() macro by get_lmask(32) function Philippe Mathieu-Daudé
2021-08-18 17:09 ` Richard Henderson
2021-08-18 21:30 ` Philippe Mathieu-Daudé
2021-08-18 16:43 ` Philippe Mathieu-Daudé [this message]
2021-08-18 16:43 ` [PATCH 4/5] target/mips: Store CP0_Config0 in DisasContext Philippe Mathieu-Daudé
2021-08-18 17:24 ` Richard Henderson
2021-08-18 16:43 ` [PATCH 5/5] target/mips: Replace TARGET_WORDS_BIGENDIAN by cpu_is_bigendian() Philippe Mathieu-Daudé
2021-08-18 17:25 ` Richard Henderson
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