From: Tong Ho <tong.ho@xilinx.com>
To: <qemu-arm@nongnu.org>
Cc: edgar.iglesias@gmail.com, alistair@alistair23.me,
tong.ho@xilinx.com, qemu-devel@nongnu.org,
peter.maydell@linaro.org
Subject: [PATCH 6/9] hw/arm: xlnx-versal: Add Xilinx BBRAM device
Date: Wed, 18 Aug 2021 21:03:05 -0700 [thread overview]
Message-ID: <20210819040308.675057-7-tong.ho@xilinx.com> (raw)
In-Reply-To: <20210819040308.675057-1-tong.ho@xilinx.com>
Connect the support for Versal Battery-Backed RAM (BBRAM)
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
---
hw/arm/xlnx-versal-virt.c | 21 +++++++++++++++++++++
hw/arm/xlnx-versal.c | 18 ++++++++++++++++++
include/hw/arm/xlnx-versal.h | 5 +++++
3 files changed, 44 insertions(+)
diff --git a/hw/arm/xlnx-versal-virt.c b/hw/arm/xlnx-versal-virt.c
index 5bca360dce..d9e2a6a853 100644
--- a/hw/arm/xlnx-versal-virt.c
+++ b/hw/arm/xlnx-versal-virt.c
@@ -356,6 +356,26 @@ static void fdt_add_rtc_node(VersalVirt *s)
g_free(name);
}
+static void fdt_add_bbram_node(VersalVirt *s)
+{
+ const char compat[] = TYPE_XLNX_BBRAM;
+ const char interrupt_names[] = "bbram-error";
+ char *name = g_strdup_printf("/bbram@%x", MM_PMC_BBRAM_CTRL);
+
+ qemu_fdt_add_subnode(s->fdt, name);
+
+ qemu_fdt_setprop_cells(s->fdt, name, "interrupts",
+ GIC_FDT_IRQ_TYPE_SPI, VERSAL_BBRAM_APB_IRQ_0,
+ GIC_FDT_IRQ_FLAGS_LEVEL_HI);
+ qemu_fdt_setprop(s->fdt, name, "interrupt-names",
+ interrupt_names, sizeof(interrupt_names));
+ qemu_fdt_setprop_sized_cells(s->fdt, name, "reg",
+ 2, MM_PMC_BBRAM_CTRL,
+ 2, MM_PMC_BBRAM_CTRL_SIZE);
+ qemu_fdt_setprop(s->fdt, name, "compatible", compat, sizeof(compat));
+ g_free(name);
+}
+
static void fdt_nop_memory_nodes(void *fdt, Error **errp)
{
Error *err = NULL;
@@ -570,6 +590,7 @@ static void versal_virt_init(MachineState *machine)
fdt_add_usb_xhci_nodes(s);
fdt_add_sd_nodes(s);
fdt_add_rtc_node(s);
+ fdt_add_bbram_node(s);
fdt_add_cpu_nodes(s, psci_conduit);
fdt_add_clk_node(s, "/clk125", 125000000, s->phandle.clk_125Mhz);
fdt_add_clk_node(s, "/clk25", 25000000, s->phandle.clk_25Mhz);
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index fb776834f7..46d7f42a6b 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -312,6 +312,23 @@ static void versal_create_xrams(Versal *s, qemu_irq *pic)
}
}
+static void versal_create_bbram(Versal *s, qemu_irq *pic)
+{
+ SysBusDevice *sbd;
+
+ object_initialize_child_with_props(OBJECT(s), "bbram", &s->pmc.bbram,
+ sizeof(s->pmc.bbram), TYPE_XLNX_BBRAM,
+ &error_fatal,
+ "crc-zpads", "0",
+ NULL);
+ sbd = SYS_BUS_DEVICE(&s->pmc.bbram);
+
+ sysbus_realize(sbd, &error_fatal);
+ memory_region_add_subregion(&s->mr_ps, MM_PMC_BBRAM_CTRL,
+ sysbus_mmio_get_region(sbd, 0));
+ sysbus_connect_irq(sbd, 0, pic[VERSAL_BBRAM_APB_IRQ_0]);
+}
+
/* This takes the board allocated linear DDR memory and creates aliases
* for each split DDR range/aperture on the Versal address map.
*/
@@ -398,6 +415,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_sds(s, pic);
versal_create_rtc(s, pic);
versal_create_xrams(s, pic);
+ versal_create_bbram(s, pic);
versal_map_ddr(s);
versal_unimp(s);
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index 22a8fa5d11..7719e8c4d2 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -24,6 +24,7 @@
#include "qom/object.h"
#include "hw/usb/xlnx-usb-subsystem.h"
#include "hw/misc/xlnx-versal-xramc.h"
+#include "hw/nvram/xlnx-bbram.h"
#define TYPE_XLNX_VERSAL "xlnx-versal"
OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)
@@ -79,6 +80,7 @@ struct Versal {
} iou;
XlnxZynqMPRTC rtc;
+ XlnxBBRam bbram;
} pmc;
struct {
@@ -105,6 +107,7 @@ struct Versal {
#define VERSAL_GEM1_WAKE_IRQ_0 59
#define VERSAL_ADMA_IRQ_0 60
#define VERSAL_XRAM_IRQ_0 79
+#define VERSAL_BBRAM_APB_IRQ_0 121
#define VERSAL_RTC_APB_ERR_IRQ 121
#define VERSAL_SD0_IRQ_0 126
#define VERSAL_RTC_ALARM_IRQ 142
@@ -170,6 +173,8 @@ struct Versal {
#define MM_PMC_SD0 0xf1040000U
#define MM_PMC_SD0_SIZE 0x10000
+#define MM_PMC_BBRAM_CTRL 0xf11f0000
+#define MM_PMC_BBRAM_CTRL_SIZE 0x00050
#define MM_PMC_CRP 0xf1260000U
#define MM_PMC_CRP_SIZE 0x10000
#define MM_PMC_RTC 0xf12a0000
--
2.25.1
next prev parent reply other threads:[~2021-08-19 4:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-19 4:02 [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM Tong Ho
2021-08-19 4:03 ` [PATCH 1/9] docs/system/arm: xlnx-versal-virt: BBRAM and eFUSE Usage Tong Ho
2021-08-19 4:03 ` [PATCH 2/9] hw/nvram: Introduce Xilinx eFuse QOM Tong Ho
2021-08-19 4:03 ` [PATCH 3/9] hw/nvram: Introduce Xilinx Versal eFuse device Tong Ho
2021-08-19 4:03 ` [PATCH 4/9] hw/nvram: Introduce Xilinx ZynqMP " Tong Ho
2021-08-19 4:03 ` [PATCH 5/9] hw/nvram: Introduce Xilinx battery-backed ram Tong Ho
2021-08-19 4:03 ` Tong Ho [this message]
2021-08-19 4:03 ` [PATCH 7/9] hw/arm: xlnx-versal: Add Xilinx eFUSE device Tong Ho
2021-08-19 4:03 ` [PATCH 8/9] hw/arm: xlnx-zynqmp: Add Xilinx BBRAM device Tong Ho
2021-08-19 4:03 ` [PATCH 9/9] hw/arm: xlnx-zynqmp: Add Xilinx eFUSE device Tong Ho
2021-08-19 15:08 ` [PATCH 0/9] hw/nvram: hw/arm: Introduce Xilinx eFUSE and BBRAM Edgar E. Iglesias
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