From: Greg Kurz <groug@kaod.org>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: Re: [PATCH 02/26] ppc/pnv: Change the POWER10 machine to support DD2 only
Date: Fri, 20 Aug 2021 15:41:04 +0200 [thread overview]
Message-ID: <20210820154104.7578fa35@bahia.lan> (raw)
In-Reply-To: <20210809134547.689560-3-clg@kaod.org>
On Mon, 9 Aug 2021 15:45:23 +0200
Cédric Le Goater <clg@kaod.org> wrote:
> There is no need to keep the DD1 chip model as it will never be
> publicly available.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
Reviewed-by: Greg Kurz <groug@kaod.org>
> include/hw/ppc/pnv.h | 2 +-
> hw/ppc/pnv.c | 2 +-
> hw/ppc/pnv_core.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index d69cee17b232..3fec7c87d82d 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -170,7 +170,7 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8NVL,
> DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER9,
> TYPE_PNV_CHIP_POWER9)
>
> -#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v1.0")
> +#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v2.0")
> DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
> TYPE_PNV_CHIP_POWER10)
>
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index d16dd2d0801d..b122251d1a5d 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1916,7 +1916,7 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
> static const char compat[] = "qemu,powernv10\0ibm,powernv";
>
> mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
> - mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v1.0");
> + mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
>
> pmc->compat = compat;
> pmc->compat_size = sizeof(compat);
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index 8c2a15a0fb2f..4de8414df212 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -347,7 +347,7 @@ static const TypeInfo pnv_core_infos[] = {
> DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"),
> DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"),
> DEFINE_PNV_CORE_TYPE(power9, "power9_v2.0"),
> - DEFINE_PNV_CORE_TYPE(power10, "power10_v1.0"),
> + DEFINE_PNV_CORE_TYPE(power10, "power10_v2.0"),
> };
>
> DEFINE_TYPES(pnv_core_infos)
next prev parent reply other threads:[~2021-08-20 13:42 UTC|newest]
Thread overview: 49+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-09 13:45 [PATCH 00/26] ppc/pnv: Extend the powernv10 machine Cédric Le Goater
2021-08-09 13:45 ` [PATCH 01/26] ppc: Add a POWER10 DD2 CPU Cédric Le Goater
2021-08-20 13:40 ` Greg Kurz
2021-08-30 7:10 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 02/26] ppc/pnv: Change the POWER10 machine to support DD2 only Cédric Le Goater
2021-08-20 13:41 ` Greg Kurz [this message]
2021-08-09 13:45 ` [PATCH 03/26] ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-saving mode Cédric Le Goater
2021-08-09 13:45 ` [PATCH 04/26] ppc/pnv: Use a simple incrementing index for the chip-id Cédric Le Goater
2021-08-20 13:51 ` Greg Kurz
2021-08-30 7:11 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 05/26] ppc/pnv: Distribute RAM among the chips Cédric Le Goater
2021-08-20 14:08 ` Greg Kurz
2021-08-30 7:14 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 06/26] ppc/pnv: add a chip topology index for POWER10 Cédric Le Goater
2021-08-20 14:12 ` Greg Kurz
2021-08-30 7:15 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 07/26] ppc/xive: Export PQ get/set routines Cédric Le Goater
2021-08-09 13:45 ` [PATCH 08/26] ppc/xive: Export xive_presenter_notify() Cédric Le Goater
2021-08-09 13:45 ` [PATCH 09/26] ppc/xive2: Introduce a XIVE2 core framework Cédric Le Goater
2021-08-10 6:06 ` David Gibson
2021-08-10 13:04 ` Cédric Le Goater
2021-08-23 15:15 ` Greg Kurz
2021-08-30 7:17 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 10/26] ppc/xive2: Introduce a presenter matching routine Cédric Le Goater
2021-08-25 6:01 ` David Gibson
2021-08-30 7:15 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 11/26] ppc/pnv: Add a XIVE2 controller to the POWER10 chip Cédric Le Goater
2021-08-09 13:45 ` [PATCH 12/26] ppc/pnv: Add a OCC model for POWER10 Cédric Le Goater
2021-08-25 6:06 ` David Gibson
2021-08-09 13:45 ` [PATCH 13/26] ppc/pnv: Add POWER10 quads Cédric Le Goater
2021-08-25 6:09 ` David Gibson
2021-08-31 13:45 ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 14/26] ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge Cédric Le Goater
2021-08-09 13:45 ` [PATCH 15/26] ppc/pnv: Add a HOMER model to POWER10 Cédric Le Goater
2021-08-25 6:12 ` David Gibson
2021-08-09 13:45 ` [PATCH 16/26] ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10) Cédric Le Goater
2021-08-09 13:45 ` [PATCH 17/26] ppc/xive2: Add support for notification injection on ESB pages Cédric Le Goater
2021-08-09 13:45 ` [PATCH 18/26] ppc/xive: Add support for PQ state bits offload Cédric Le Goater
2021-08-09 13:45 ` [PATCH 19/26] ppc/pnv: Add support for PQ offload on PHB5 Cédric Le Goater
2021-08-09 13:45 ` [PATCH 20/26] ppc/pnv: Add support for PHB5 "Address-based trigger" mode Cédric Le Goater
2021-08-09 13:45 ` [PATCH 21/26] pnv/xive2: Introduce new capability bits Cédric Le Goater
2021-08-09 13:45 ` [PATCH 22/26] ppc/pnv: add XIVE Gen2 TIMA support Cédric Le Goater
2021-08-09 13:45 ` [PATCH 23/26] pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) Cédric Le Goater
2021-08-09 13:45 ` [PATCH 24/26] xive2: Add a get_config() handler for the router configuration Cédric Le Goater
2021-08-09 13:45 ` [PATCH 25/26] pnv/xive2: Add support for automatic save&restore Cédric Le Goater
2021-08-09 13:45 ` [PATCH 26/26] pnv/xive2: Add support for 8bits thread id Cédric Le Goater
2021-08-10 3:07 ` [PATCH 00/26] ppc/pnv: Extend the powernv10 machine David Gibson
2021-08-10 3:12 ` David Gibson
2021-08-10 8:58 ` Cédric Le Goater
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