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From: Bin Meng <bmeng.cn@gmail.com>
To: Damien Hedde <damien.hedde@greensocs.com>,
	"Edgar E . Iglesias" <edgar.iglesias@xilinx.com>,
	Alistair Francis <alistair.francis@wdc.com>,
	Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: [PATCH 2/3] hw/char: cadence_uart: Disable transmit when input clock is disabled
Date: Mon, 23 Aug 2021 10:08:12 +0800	[thread overview]
Message-ID: <20210823020813.25192-3-bmeng.cn@gmail.com> (raw)
In-Reply-To: <20210823020813.25192-1-bmeng.cn@gmail.com>

At present when input clock is disabled, any character transmitted
to tx fifo can still show on the serial line, which is wrong.

Fixes: b636db306e06 ("hw/char/cadence_uart: add clock support")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---

 hw/char/cadence_uart.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index b4b5e8a3ee..154be34992 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -327,6 +327,11 @@ static gboolean cadence_uart_xmit(void *do_not_use, GIOCondition cond,
 static void uart_write_tx_fifo(CadenceUARTState *s, const uint8_t *buf,
                                int size)
 {
+    /* ignore characters when unclocked or in reset */
+    if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
+        return;
+    }
+
     if ((s->r[R_CR] & UART_CR_TX_DIS) || !(s->r[R_CR] & UART_CR_TX_EN)) {
         return;
     }
-- 
2.25.1



  parent reply	other threads:[~2021-08-23  2:12 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-23  2:08 [PATCH 0/3] hw/arm: xilinx_zynq: Fix upstream U-Boot boot failure Bin Meng
2021-08-23  2:08 ` [PATCH 1/3] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase Bin Meng
2021-08-23  4:42   ` Alistair Francis
2021-08-23 13:45     ` Edgar E. Iglesias
2021-08-23  2:08 ` Bin Meng [this message]
2021-08-23  4:43   ` [PATCH 2/3] hw/char: cadence_uart: Disable transmit when input clock is disabled Alistair Francis
2021-08-23  4:52     ` Bin Meng
2021-08-23  6:52       ` Alistair Francis
2021-08-23 13:58     ` Edgar E. Iglesias
2021-08-23  8:14   ` Philippe Mathieu-Daudé
2021-08-23  9:57     ` Bin Meng
2021-08-23 10:43       ` Philippe Mathieu-Daudé
2021-08-23 13:14         ` Bin Meng
2021-08-23 13:21           ` Philippe Mathieu-Daudé
2021-08-23  2:08 ` [PATCH 3/3] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() Bin Meng
2021-08-23  8:17   ` Philippe Mathieu-Daudé

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