From: Andrew Jones <drjones@redhat.com>
To: qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, richard.henderson@linaro.org,
ishii.shuuichir@fujitsu.com, philmd@redhat.com
Subject: [PATCH v2 1/4] target/arm/cpu: Introduce sve_vq_supported bitmap
Date: Mon, 23 Aug 2021 18:06:44 +0200 [thread overview]
Message-ID: <20210823160647.34028-2-drjones@redhat.com> (raw)
In-Reply-To: <20210823160647.34028-1-drjones@redhat.com>
Allow CPUs that support SVE to specify which SVE vector lengths they
support by setting them in this bitmap. Currently only the 'max' and
'host' CPU types supports SVE and 'host' requires KVM which obtains
its supported bitmap from the host. So, we only need to initialize the
bitmap for 'max' with TCG. And, since 'max' should support all SVE
vector lengths we simply fill the bitmap. Future CPU types may have
less trivial maps though.
Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
target/arm/cpu.h | 4 ++++
target/arm/cpu64.c | 2 ++
2 files changed, 6 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 9f0a5f84d503..cc645b57421f 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -1019,9 +1019,13 @@ struct ARMCPU {
* While processing properties during initialization, corresponding
* sve_vq_init bits are set for bits in sve_vq_map that have been
* set by properties.
+ *
+ * Bits set in sve_vq_supported represent valid vector lengths for
+ * the CPU type.
*/
DECLARE_BITMAP(sve_vq_map, ARM_MAX_VQ);
DECLARE_BITMAP(sve_vq_init, ARM_MAX_VQ);
+ DECLARE_BITMAP(sve_vq_supported, ARM_MAX_VQ);
/* Generic timer counter frequency, in Hz */
uint64_t gt_cntfrq_hz;
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index c690318a9b63..eb9318c83b74 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -840,6 +840,8 @@ static void aarch64_max_initfn(Object *obj)
/* Default to PAUTH on, with the architected algorithm. */
qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_property);
qdev_property_add_static(DEVICE(obj), &arm_cpu_pauth_impdef_property);
+
+ bitmap_fill(cpu->sve_vq_supported, ARM_MAX_VQ);
}
aarch64_add_sve_properties(obj);
--
2.31.1
next prev parent reply other threads:[~2021-08-23 16:08 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-23 16:06 [PATCH v2 0/4] target/arm/cpu: Introduce sve_vq_supported bitmap Andrew Jones
2021-08-23 16:06 ` Andrew Jones [this message]
2021-08-23 17:43 ` [PATCH v2 1/4] " Richard Henderson
2021-08-23 16:06 ` [PATCH v2 2/4] target/arm/kvm64: Ensure sve vls map is completely clear Andrew Jones
2021-08-23 17:45 ` Richard Henderson
2021-08-23 16:06 ` [PATCH v2 3/4] target/arm/cpu64: Replace kvm_supported with sve_vq_supported Andrew Jones
2021-08-23 17:53 ` Richard Henderson
2021-08-24 6:28 ` Andrew Jones
2021-08-24 6:47 ` Andrew Jones
2021-08-23 16:06 ` [PATCH v2 4/4] target/arm/cpu64: Validate sve vector lengths are supported Andrew Jones
2021-08-23 18:04 ` Richard Henderson
2021-08-24 6:28 ` Andrew Jones
2021-08-26 13:22 ` [PATCH v2 0/4] target/arm/cpu: Introduce sve_vq_supported bitmap Peter Maydell
2021-08-27 8:30 ` ishii.shuuichir
2021-08-27 8:57 ` Peter Maydell
2021-08-30 0:02 ` ishii.shuuichir
2021-08-27 10:03 ` Andrew Jones
2021-08-30 4:49 ` ishii.shuuichir
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