* [Patch v2 1/2] hw/arm/xlnx-versal: Add unimplemented APU mmio
2021-08-23 17:38 [Patch v2 0/2] hw/arm/xlnx-versal: hw/arm/xlnx-zynqmp: Add unimplemented mmio Tong Ho
@ 2021-08-23 17:38 ` Tong Ho
2021-08-23 17:38 ` [Patch v2 2/2] hw/arm/xlnx-zynqmp: " Tong Ho
2021-08-26 16:00 ` [Patch v2 0/2] hw/arm/xlnx-versal: hw/arm/xlnx-zynqmp: Add unimplemented mmio Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Tong Ho @ 2021-08-23 17:38 UTC (permalink / raw)
To: qemu-arm
Cc: peter.maydell, alistair, qemu-devel, philippe.mathieu.daude,
edgar.iglesias, tong.ho
Add unimplemented APU mmio region to xlnx-versal for booting
bare-metal guests built with standalone bsp, which access the
region from one of the following places:
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/armclang/boot.S#L139
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/gcc/boot.S#L183
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
---
hw/arm/xlnx-versal.c | 2 ++
include/hw/arm/xlnx-versal.h | 2 ++
2 files changed, 4 insertions(+)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index fb776834f7..cb6ec0a4a0 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -376,6 +376,8 @@ static void versal_unimp(Versal *s)
MM_CRL, MM_CRL_SIZE);
versal_unimp_area(s, "crf", &s->mr_ps,
MM_FPD_CRF, MM_FPD_CRF_SIZE);
+ versal_unimp_area(s, "apu", &s->mr_ps,
+ MM_FPD_FPD_APU, MM_FPD_FPD_APU_SIZE);
versal_unimp_area(s, "crp", &s->mr_ps,
MM_PMC_CRP, MM_PMC_CRP_SIZE);
versal_unimp_area(s, "iou-scntr", &s->mr_ps,
diff --git a/include/hw/arm/xlnx-versal.h b/include/hw/arm/xlnx-versal.h
index 22a8fa5d11..9b79051747 100644
--- a/include/hw/arm/xlnx-versal.h
+++ b/include/hw/arm/xlnx-versal.h
@@ -167,6 +167,8 @@ struct Versal {
#define MM_IOU_SCNTRS_SIZE 0x10000
#define MM_FPD_CRF 0xfd1a0000U
#define MM_FPD_CRF_SIZE 0x140000
+#define MM_FPD_FPD_APU 0xfd5c0000
+#define MM_FPD_FPD_APU_SIZE 0x100
#define MM_PMC_SD0 0xf1040000U
#define MM_PMC_SD0_SIZE 0x10000
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [Patch v2 2/2] hw/arm/xlnx-zynqmp: Add unimplemented APU mmio
2021-08-23 17:38 [Patch v2 0/2] hw/arm/xlnx-versal: hw/arm/xlnx-zynqmp: Add unimplemented mmio Tong Ho
2021-08-23 17:38 ` [Patch v2 1/2] hw/arm/xlnx-versal: Add unimplemented APU mmio Tong Ho
@ 2021-08-23 17:38 ` Tong Ho
2021-08-26 16:00 ` [Patch v2 0/2] hw/arm/xlnx-versal: hw/arm/xlnx-zynqmp: Add unimplemented mmio Peter Maydell
2 siblings, 0 replies; 4+ messages in thread
From: Tong Ho @ 2021-08-23 17:38 UTC (permalink / raw)
To: qemu-arm
Cc: peter.maydell, alistair, qemu-devel, philippe.mathieu.daude,
edgar.iglesias, tong.ho
Add unimplemented APU mmio region to xlnx-zynqmp for booting
bare-metal guests built with standalone bsp, which access the
region from one of the following places:
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/armclang/boot.S#L139
https://github.com/Xilinx/embeddedsw/blob/release-2020.2/lib/bsp/standalone/src/arm/ARMv8/64bit/gcc/boot.S#L183
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Tong Ho <tong.ho@xilinx.com>
---
hw/arm/xlnx-zynqmp.c | 32 ++++++++++++++++++++++++++++++++
include/hw/arm/xlnx-zynqmp.h | 7 +++++++
2 files changed, 39 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 3597e8db4d..fb70204662 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -20,6 +20,7 @@
#include "qemu/module.h"
#include "hw/arm/xlnx-zynqmp.h"
#include "hw/intc/arm_gic_common.h"
+#include "hw/misc/unimp.h"
#include "hw/boards.h"
#include "sysemu/kvm.h"
#include "sysemu/sysemu.h"
@@ -56,6 +57,9 @@
#define DPDMA_ADDR 0xfd4c0000
#define DPDMA_IRQ 116
+#define APU_ADDR 0xfd5c0000
+#define APU_SIZE 0x100
+
#define IPI_ADDR 0xFF300000
#define IPI_IRQ 64
@@ -222,6 +226,32 @@ static void xlnx_zynqmp_create_rpu(MachineState *ms, XlnxZynqMPState *s,
qdev_realize(DEVICE(&s->rpu_cluster), NULL, &error_fatal);
}
+static void xlnx_zynqmp_create_unimp_mmio(XlnxZynqMPState *s)
+{
+ static const struct UnimpInfo {
+ const char *name;
+ hwaddr base;
+ hwaddr size;
+ } unimp_areas[ARRAY_SIZE(s->mr_unimp)] = {
+ { .name = "apu", APU_ADDR, APU_SIZE },
+ };
+ unsigned int nr;
+
+ for (nr = 0; nr < ARRAY_SIZE(unimp_areas); nr++) {
+ const struct UnimpInfo *info = &unimp_areas[nr];
+ DeviceState *dev = qdev_new(TYPE_UNIMPLEMENTED_DEVICE);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+
+ assert(info->name && info->base && info->size > 0);
+ qdev_prop_set_string(dev, "name", info->name);
+ qdev_prop_set_uint64(dev, "size", info->size);
+ object_property_add_child(OBJECT(s), info->name, OBJECT(dev));
+
+ sysbus_realize_and_unref(sbd, &error_fatal);
+ sysbus_mmio_map(sbd, 0, info->base);
+ }
+}
+
static void xlnx_zynqmp_init(Object *obj)
{
MachineState *ms = MACHINE(qdev_get_machine());
@@ -616,6 +646,8 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->rtc), 0, RTC_ADDR);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->rtc), 0, gic_spi[RTC_IRQ]);
+ xlnx_zynqmp_create_unimp_mmio(s);
+
for (i = 0; i < XLNX_ZYNQMP_NUM_GDMA_CH; i++) {
if (!object_property_set_uint(OBJECT(&s->gdma[i]), "bus-width", 128,
errp)) {
diff --git a/include/hw/arm/xlnx-zynqmp.h b/include/hw/arm/xlnx-zynqmp.h
index d3e2ef97f6..c84fe15996 100644
--- a/include/hw/arm/xlnx-zynqmp.h
+++ b/include/hw/arm/xlnx-zynqmp.h
@@ -79,6 +79,11 @@ OBJECT_DECLARE_SIMPLE_TYPE(XlnxZynqMPState, XLNX_ZYNQMP)
#define XLNX_ZYNQMP_MAX_RAM_SIZE (XLNX_ZYNQMP_MAX_LOW_RAM_SIZE + \
XLNX_ZYNQMP_MAX_HIGH_RAM_SIZE)
+/*
+ * Unimplemented mmio regions needed to boot some images.
+ */
+#define XLNX_ZYNQMP_NUM_UNIMP_AREAS 1
+
struct XlnxZynqMPState {
/*< private >*/
DeviceState parent_obj;
@@ -96,6 +101,8 @@ struct XlnxZynqMPState {
MemoryRegion *ddr_ram;
MemoryRegion ddr_ram_low, ddr_ram_high;
+ MemoryRegion mr_unimp[XLNX_ZYNQMP_NUM_UNIMP_AREAS];
+
CadenceGEMState gem[XLNX_ZYNQMP_NUM_GEMS];
CadenceUARTState uart[XLNX_ZYNQMP_NUM_UARTS];
XlnxZynqMPCANState can[XLNX_ZYNQMP_NUM_CAN];
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread