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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 09/37] target/arm/cpu64: Validate sve vector lengths are supported
Date: Thu, 26 Aug 2021 18:02:39 +0100	[thread overview]
Message-ID: <20210826170307.27733-10-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210826170307.27733-1-peter.maydell@linaro.org>

From: Andrew Jones <drjones@redhat.com>

Future CPU types may specify which vector lengths are supported.
We can apply nearly the same logic to validate those lengths
as we do for KVM's supported vector lengths. We merge the code
where we can, but unfortunately can't completely merge it because
KVM requires all vector lengths, power-of-two or not, smaller than
the maximum enabled length to also be enabled. The architecture
only requires all the power-of-two lengths, though, so TCG will
only enforce that.

Signed-off-by: Andrew Jones <drjones@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210823160647.34028-5-drjones@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/cpu64.c | 101 ++++++++++++++++++++-------------------------
 1 file changed, 45 insertions(+), 56 deletions(-)

diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 557fd475774..2f0cbddab56 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -329,35 +329,26 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
                     break;
                 }
             }
-            max_vq = vq <= ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ;
-            bitmap_andnot(cpu->sve_vq_map, cpu->sve_vq_supported,
-                          cpu->sve_vq_init, max_vq);
-            if (max_vq == 0 || bitmap_empty(cpu->sve_vq_map, max_vq)) {
-                error_setg(errp, "cannot disable sve%d", vq * 128);
-                error_append_hint(errp, "Disabling sve%d results in all "
-                                  "vector lengths being disabled.\n",
-                                  vq * 128);
-                error_append_hint(errp, "With SVE enabled, at least one "
-                                  "vector length must be enabled.\n");
-                return;
-            }
         } else {
             /* Disabling a power-of-two disables all larger lengths. */
-            if (test_bit(0, cpu->sve_vq_init)) {
-                error_setg(errp, "cannot disable sve128");
-                error_append_hint(errp, "Disabling sve128 results in all "
-                                  "vector lengths being disabled.\n");
-                error_append_hint(errp, "With SVE enabled, at least one "
-                                  "vector length must be enabled.\n");
-                return;
-            }
-            for (vq = 2; vq <= ARM_MAX_VQ; vq <<= 1) {
+            for (vq = 1; vq <= ARM_MAX_VQ; vq <<= 1) {
                 if (test_bit(vq - 1, cpu->sve_vq_init)) {
                     break;
                 }
             }
-            max_vq = vq <= ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ;
-            bitmap_complement(cpu->sve_vq_map, cpu->sve_vq_init, max_vq);
+        }
+
+        max_vq = vq <= ARM_MAX_VQ ? vq - 1 : ARM_MAX_VQ;
+        bitmap_andnot(cpu->sve_vq_map, cpu->sve_vq_supported,
+                      cpu->sve_vq_init, max_vq);
+        if (max_vq == 0 || bitmap_empty(cpu->sve_vq_map, max_vq)) {
+            error_setg(errp, "cannot disable sve%d", vq * 128);
+            error_append_hint(errp, "Disabling sve%d results in all "
+                              "vector lengths being disabled.\n",
+                              vq * 128);
+            error_append_hint(errp, "With SVE enabled, at least one "
+                              "vector length must be enabled.\n");
+            return;
         }
 
         max_vq = find_last_bit(cpu->sve_vq_map, max_vq) + 1;
@@ -393,46 +384,44 @@ void arm_cpu_sve_finalize(ARMCPU *cpu, Error **errp)
     assert(max_vq != 0);
     bitmap_clear(cpu->sve_vq_map, max_vq, ARM_MAX_VQ - max_vq);
 
-    if (kvm_enabled()) {
-        /* Ensure the set of lengths matches what KVM supports. */
-        bitmap_xor(tmp, cpu->sve_vq_map, cpu->sve_vq_supported, max_vq);
-        if (!bitmap_empty(tmp, max_vq)) {
-            vq = find_last_bit(tmp, max_vq) + 1;
-            if (test_bit(vq - 1, cpu->sve_vq_map)) {
-                if (cpu->sve_max_vq) {
-                    error_setg(errp, "cannot set sve-max-vq=%d",
-                               cpu->sve_max_vq);
-                    error_append_hint(errp, "This KVM host does not support "
-                                      "the vector length %d-bits.\n",
-                                      vq * 128);
-                    error_append_hint(errp, "It may not be possible to use "
-                                      "sve-max-vq with this KVM host. Try "
-                                      "using only sve<N> properties.\n");
-                } else {
-                    error_setg(errp, "cannot enable sve%d", vq * 128);
-                    error_append_hint(errp, "This KVM host does not support "
-                                      "the vector length %d-bits.\n",
-                                      vq * 128);
-                }
+    /* Ensure the set of lengths matches what is supported. */
+    bitmap_xor(tmp, cpu->sve_vq_map, cpu->sve_vq_supported, max_vq);
+    if (!bitmap_empty(tmp, max_vq)) {
+        vq = find_last_bit(tmp, max_vq) + 1;
+        if (test_bit(vq - 1, cpu->sve_vq_map)) {
+            if (cpu->sve_max_vq) {
+                error_setg(errp, "cannot set sve-max-vq=%d", cpu->sve_max_vq);
+                error_append_hint(errp, "This CPU does not support "
+                                  "the vector length %d-bits.\n", vq * 128);
+                error_append_hint(errp, "It may not be possible to use "
+                                  "sve-max-vq with this CPU. Try "
+                                  "using only sve<N> properties.\n");
             } else {
+                error_setg(errp, "cannot enable sve%d", vq * 128);
+                error_append_hint(errp, "This CPU does not support "
+                                  "the vector length %d-bits.\n", vq * 128);
+            }
+            return;
+        } else {
+            if (kvm_enabled()) {
                 error_setg(errp, "cannot disable sve%d", vq * 128);
                 error_append_hint(errp, "The KVM host requires all "
                                   "supported vector lengths smaller "
                                   "than %d bits to also be enabled.\n",
                                   max_vq * 128);
-            }
-            return;
-        }
-    } else {
-        /* Ensure all required powers-of-two are enabled. */
-        for (vq = pow2floor(max_vq); vq >= 1; vq >>= 1) {
-            if (!test_bit(vq - 1, cpu->sve_vq_map)) {
-                error_setg(errp, "cannot disable sve%d", vq * 128);
-                error_append_hint(errp, "sve%d is required as it "
-                                  "is a power-of-two length smaller than "
-                                  "the maximum, sve%d\n",
-                                  vq * 128, max_vq * 128);
                 return;
+            } else {
+                /* Ensure all required powers-of-two are enabled. */
+                for (vq = pow2floor(max_vq); vq >= 1; vq >>= 1) {
+                    if (!test_bit(vq - 1, cpu->sve_vq_map)) {
+                        error_setg(errp, "cannot disable sve%d", vq * 128);
+                        error_append_hint(errp, "sve%d is required as it "
+                                          "is a power-of-two length smaller "
+                                          "than the maximum, sve%d\n",
+                                          vq * 128, max_vq * 128);
+                        return;
+                    }
+                }
             }
         }
     }
-- 
2.20.1



  parent reply	other threads:[~2021-08-26 17:14 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-26 17:02 [PULL 00/37] target-arm queue Peter Maydell
2021-08-26 17:02 ` [PULL 01/37] hw/arm/xlnx-zynqmp: Realize qspi controller *after* qspi_dma Peter Maydell
2021-08-26 17:02 ` [PULL 02/37] hw/dma/xlnx_csu_dma: Run trivial checks early in realize() Peter Maydell
2021-08-26 17:02 ` [PULL 03/37] hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set Peter Maydell
2021-08-26 17:02 ` [PULL 04/37] hw/dma/xlnx-zdma " Peter Maydell
2021-08-26 17:02 ` [PULL 05/37] hw/arm/Kconfig: no need to enable ACPI_MEMORY_HOTPLUG/ACPI_NVDIMM explicitly Peter Maydell
2021-08-26 17:02 ` [PULL 06/37] target/arm/cpu: Introduce sve_vq_supported bitmap Peter Maydell
2021-08-26 17:02 ` [PULL 07/37] target/arm/kvm64: Ensure sve vls map is completely clear Peter Maydell
2021-08-26 17:02 ` [PULL 08/37] target/arm/cpu64: Replace kvm_supported with sve_vq_supported Peter Maydell
2021-08-26 17:02 ` Peter Maydell [this message]
2021-08-26 17:02 ` [PULL 10/37] docs/specs/acpu_cpu_hotplug: Convert to rST Peter Maydell
2021-08-26 17:02 ` [PULL 11/37] docs/specs/acpi_mem_hotplug: " Peter Maydell
2021-08-26 17:02 ` [PULL 12/37] docs/specs/acpi_pci_hotplug: " Peter Maydell
2021-08-26 17:02 ` [PULL 13/37] docs/specs/acpi_nvdimm: " Peter Maydell
2021-08-26 17:02 ` [PULL 14/37] MAINTAINERS: Add ACPI specs documents to ACPI and NVDIMM sections Peter Maydell
2021-08-26 17:02 ` [PULL 15/37] softmmu: Use accel_find("xen") instead of xen_available() Peter Maydell
2021-08-26 17:02 ` [PULL 16/37] monitor: Use accel_find("kvm") instead of kvm_available() Peter Maydell
2021-08-26 17:02 ` [PULL 17/37] softmmu/arch_init.c: Trim down include list Peter Maydell
2021-08-26 17:02 ` [PULL 18/37] meson.build: Define QEMU_ARCH in config-target.h Peter Maydell
2021-08-26 17:02 ` [PULL 19/37] arch_init.h: Add QEMU_ARCH_HEXAGON Peter Maydell
2021-08-26 17:02 ` [PULL 20/37] arch_init.h: Move QEMU_ARCH_VIRTIO_* to qdev-monitor.c Peter Maydell
2021-08-26 17:02 ` [PULL 21/37] arch_init.h: Don't include arch_init.h unnecessarily Peter Maydell
2021-08-26 17:02 ` [PULL 22/37] stubs: Remove unused arch_type.c stub Peter Maydell
2021-08-26 17:02 ` [PULL 23/37] hw/core/loader: In gunzip(), check index is in range before use, not after Peter Maydell
2021-08-26 17:02 ` [PULL 24/37] softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd() Peter Maydell
2021-08-26 17:02 ` [PULL 25/37] softmmu/physmem.c: Check return value from realpath() Peter Maydell
2021-08-26 17:02 ` [PULL 26/37] net: Zero sockaddr_in in parse_host_port() Peter Maydell
2021-08-26 17:02 ` [PULL 27/37] gdbstub: Zero-initialize sockaddr structs Peter Maydell
2021-08-26 17:02 ` [PULL 28/37] tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct Peter Maydell
2021-08-26 17:02 ` [PULL 29/37] tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structs Peter Maydell
2021-08-26 17:03 ` [PULL 30/37] raspi: Use error_fatal for SoC realize errors, not error_abort Peter Maydell
2021-08-26 17:03 ` [PULL 31/37] target/arm: Avoid assertion trying to use KVM and multiple ASes Peter Maydell
2021-08-26 17:03 ` [PULL 32/37] hw/arm/virt: Delete EL3 error checksnow provided in CPU realize Peter Maydell
2021-08-26 17:03 ` [PULL 33/37] target/arm: Implement HSTR.TTEE Peter Maydell
2021-08-26 17:03 ` [PULL 34/37] target/arm: Implement HSTR.TJDBX Peter Maydell
2021-08-26 17:03 ` [PULL 35/37] target/arm: Do hflags rebuild in cpsr_write() Peter Maydell
2021-08-26 17:18   ` Philippe Mathieu-Daudé
2021-08-26 17:03 ` [PULL 36/37] hw/arm/xlnx-versal: Add unimplemented APU mmio Peter Maydell
2021-08-26 17:03 ` [PULL 37/37] hw/arm/xlnx-zynqmp: " Peter Maydell
2021-08-26 19:44 ` [PULL 00/37] target-arm queue Peter Maydell

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