From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 03/37] hw/dma/xlnx_csu_dma: Always expect 'dma' link property to be set
Date: Thu, 26 Aug 2021 18:02:33 +0100 [thread overview]
Message-ID: <20210826170307.27733-4-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210826170307.27733-1-peter.maydell@linaro.org>
From: Philippe Mathieu-Daudé <philmd@redhat.com>
Simplify by always passing a MemoryRegion property to the device.
Doing so we can move the AddressSpace field to the device struct,
removing need for heap allocation.
Update the Xilinx ZynqMP SoC model to pass the default system
memory instead of a NULL value.
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20210819163422.2863447-4-philmd@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
include/hw/dma/xlnx_csu_dma.h | 2 +-
hw/arm/xlnx-zynqmp.c | 4 ++++
hw/dma/xlnx_csu_dma.c | 21 ++++++++++-----------
3 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/include/hw/dma/xlnx_csu_dma.h b/include/hw/dma/xlnx_csu_dma.h
index 204d94c6737..9e9dc551e99 100644
--- a/include/hw/dma/xlnx_csu_dma.h
+++ b/include/hw/dma/xlnx_csu_dma.h
@@ -30,7 +30,7 @@ typedef struct XlnxCSUDMA {
MemoryRegion iomem;
MemTxAttrs attr;
MemoryRegion *dma_mr;
- AddressSpace *dma_as;
+ AddressSpace dma_as;
qemu_irq irq;
StreamSink *tx_dev; /* Used as generic StreamSink */
ptimer_state *src_timer;
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 9724978761b..4344e223f2d 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -620,6 +620,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error **errp)
gic_spi[adma_ch_intr[i]]);
}
+ if (!object_property_set_link(OBJECT(&s->qspi_dma), "dma",
+ OBJECT(system_memory), errp)) {
+ return;
+ }
if (!sysbus_realize(SYS_BUS_DEVICE(&s->qspi_dma), errp)) {
return;
}
diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c
index 2d19f415ef3..896bb3574dd 100644
--- a/hw/dma/xlnx_csu_dma.c
+++ b/hw/dma/xlnx_csu_dma.c
@@ -201,11 +201,11 @@ static uint32_t xlnx_csu_dma_read(XlnxCSUDMA *s, uint8_t *buf, uint32_t len)
for (i = 0; i < len && (result == MEMTX_OK); i += s->width) {
uint32_t mlen = MIN(len - i, s->width);
- result = address_space_rw(s->dma_as, addr, s->attr,
+ result = address_space_rw(&s->dma_as, addr, s->attr,
buf + i, mlen, false);
}
} else {
- result = address_space_rw(s->dma_as, addr, s->attr, buf, len, false);
+ result = address_space_rw(&s->dma_as, addr, s->attr, buf, len, false);
}
if (result == MEMTX_OK) {
@@ -232,12 +232,12 @@ static uint32_t xlnx_csu_dma_write(XlnxCSUDMA *s, uint8_t *buf, uint32_t len)
for (i = 0; i < len && (result == MEMTX_OK); i += s->width) {
uint32_t mlen = MIN(len - i, s->width);
- result = address_space_rw(s->dma_as, addr, s->attr,
+ result = address_space_rw(&s->dma_as, addr, s->attr,
buf, mlen, true);
buf += mlen;
}
} else {
- result = address_space_rw(s->dma_as, addr, s->attr, buf, len, true);
+ result = address_space_rw(&s->dma_as, addr, s->attr, buf, len, true);
}
if (result != MEMTX_OK) {
@@ -631,6 +631,12 @@ static void xlnx_csu_dma_realize(DeviceState *dev, Error **errp)
return;
}
+ if (!s->dma_mr) {
+ error_setg(errp, TYPE_XLNX_CSU_DMA " 'dma' link not set");
+ return;
+ }
+ address_space_init(&s->dma_as, s->dma_mr, "csu-dma");
+
reg_array =
register_init_block32(dev, xlnx_csu_dma_regs_info[!!s->is_dst],
XLNX_CSU_DMA_R_MAX,
@@ -648,13 +654,6 @@ static void xlnx_csu_dma_realize(DeviceState *dev, Error **errp)
s->src_timer = ptimer_init(xlnx_csu_dma_src_timeout_hit,
s, PTIMER_POLICY_DEFAULT);
- if (s->dma_mr) {
- s->dma_as = g_malloc0(sizeof(AddressSpace));
- address_space_init(s->dma_as, s->dma_mr, NULL);
- } else {
- s->dma_as = &address_space_memory;
- }
-
s->attr = MEMTXATTRS_UNSPECIFIED;
s->r_size_last_word = 0;
--
2.20.1
next prev parent reply other threads:[~2021-08-26 17:07 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-26 17:02 [PULL 00/37] target-arm queue Peter Maydell
2021-08-26 17:02 ` [PULL 01/37] hw/arm/xlnx-zynqmp: Realize qspi controller *after* qspi_dma Peter Maydell
2021-08-26 17:02 ` [PULL 02/37] hw/dma/xlnx_csu_dma: Run trivial checks early in realize() Peter Maydell
2021-08-26 17:02 ` Peter Maydell [this message]
2021-08-26 17:02 ` [PULL 04/37] hw/dma/xlnx-zdma Always expect 'dma' link property to be set Peter Maydell
2021-08-26 17:02 ` [PULL 05/37] hw/arm/Kconfig: no need to enable ACPI_MEMORY_HOTPLUG/ACPI_NVDIMM explicitly Peter Maydell
2021-08-26 17:02 ` [PULL 06/37] target/arm/cpu: Introduce sve_vq_supported bitmap Peter Maydell
2021-08-26 17:02 ` [PULL 07/37] target/arm/kvm64: Ensure sve vls map is completely clear Peter Maydell
2021-08-26 17:02 ` [PULL 08/37] target/arm/cpu64: Replace kvm_supported with sve_vq_supported Peter Maydell
2021-08-26 17:02 ` [PULL 09/37] target/arm/cpu64: Validate sve vector lengths are supported Peter Maydell
2021-08-26 17:02 ` [PULL 10/37] docs/specs/acpu_cpu_hotplug: Convert to rST Peter Maydell
2021-08-26 17:02 ` [PULL 11/37] docs/specs/acpi_mem_hotplug: " Peter Maydell
2021-08-26 17:02 ` [PULL 12/37] docs/specs/acpi_pci_hotplug: " Peter Maydell
2021-08-26 17:02 ` [PULL 13/37] docs/specs/acpi_nvdimm: " Peter Maydell
2021-08-26 17:02 ` [PULL 14/37] MAINTAINERS: Add ACPI specs documents to ACPI and NVDIMM sections Peter Maydell
2021-08-26 17:02 ` [PULL 15/37] softmmu: Use accel_find("xen") instead of xen_available() Peter Maydell
2021-08-26 17:02 ` [PULL 16/37] monitor: Use accel_find("kvm") instead of kvm_available() Peter Maydell
2021-08-26 17:02 ` [PULL 17/37] softmmu/arch_init.c: Trim down include list Peter Maydell
2021-08-26 17:02 ` [PULL 18/37] meson.build: Define QEMU_ARCH in config-target.h Peter Maydell
2021-08-26 17:02 ` [PULL 19/37] arch_init.h: Add QEMU_ARCH_HEXAGON Peter Maydell
2021-08-26 17:02 ` [PULL 20/37] arch_init.h: Move QEMU_ARCH_VIRTIO_* to qdev-monitor.c Peter Maydell
2021-08-26 17:02 ` [PULL 21/37] arch_init.h: Don't include arch_init.h unnecessarily Peter Maydell
2021-08-26 17:02 ` [PULL 22/37] stubs: Remove unused arch_type.c stub Peter Maydell
2021-08-26 17:02 ` [PULL 23/37] hw/core/loader: In gunzip(), check index is in range before use, not after Peter Maydell
2021-08-26 17:02 ` [PULL 24/37] softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd() Peter Maydell
2021-08-26 17:02 ` [PULL 25/37] softmmu/physmem.c: Check return value from realpath() Peter Maydell
2021-08-26 17:02 ` [PULL 26/37] net: Zero sockaddr_in in parse_host_port() Peter Maydell
2021-08-26 17:02 ` [PULL 27/37] gdbstub: Zero-initialize sockaddr structs Peter Maydell
2021-08-26 17:02 ` [PULL 28/37] tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct Peter Maydell
2021-08-26 17:02 ` [PULL 29/37] tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structs Peter Maydell
2021-08-26 17:03 ` [PULL 30/37] raspi: Use error_fatal for SoC realize errors, not error_abort Peter Maydell
2021-08-26 17:03 ` [PULL 31/37] target/arm: Avoid assertion trying to use KVM and multiple ASes Peter Maydell
2021-08-26 17:03 ` [PULL 32/37] hw/arm/virt: Delete EL3 error checksnow provided in CPU realize Peter Maydell
2021-08-26 17:03 ` [PULL 33/37] target/arm: Implement HSTR.TTEE Peter Maydell
2021-08-26 17:03 ` [PULL 34/37] target/arm: Implement HSTR.TJDBX Peter Maydell
2021-08-26 17:03 ` [PULL 35/37] target/arm: Do hflags rebuild in cpsr_write() Peter Maydell
2021-08-26 17:18 ` Philippe Mathieu-Daudé
2021-08-26 17:03 ` [PULL 36/37] hw/arm/xlnx-versal: Add unimplemented APU mmio Peter Maydell
2021-08-26 17:03 ` [PULL 37/37] hw/arm/xlnx-zynqmp: " Peter Maydell
2021-08-26 19:44 ` [PULL 00/37] target-arm queue Peter Maydell
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