qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: "David Gibson" <david@gibson.dropbear.id.au>,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [PULL 11/18] ppc/pnv: Distribute RAM among the chips
Date: Fri, 27 Aug 2021 17:09:39 +1000	[thread overview]
Message-ID: <20210827070946.219970-12-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20210827070946.219970-1-david@gibson.dropbear.id.au>

From: Cédric Le Goater <clg@kaod.org>

But always give the first 1GB to chip 0 as skiboot requires it.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210809134547.689560-6-clg@kaod.org>
Reviewed-by: Greg Kurz <groug@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 hw/ppc/pnv.c | 33 +++++++++++++++++++++++++--------
 1 file changed, 25 insertions(+), 8 deletions(-)

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index 025f01c557..2f5358b70c 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -710,6 +710,23 @@ static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon)
     pnv_psi_pic_print_info(&chip10->psi, mon);
 }
 
+/* Always give the first 1GB to chip 0 else we won't boot */
+static uint64_t pnv_chip_get_ram_size(PnvMachineState *pnv, int chip_id)
+{
+    MachineState *machine = MACHINE(pnv);
+    uint64_t ram_per_chip;
+
+    assert(machine->ram_size >= 1 * GiB);
+
+    ram_per_chip = machine->ram_size / pnv->num_chips;
+    if (ram_per_chip >= 1 * GiB) {
+        return QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB);
+    }
+
+    ram_per_chip = (machine->ram_size - 1 * GiB) / (pnv->num_chips - 1);
+    return chip_id == 0 ? 1 * GiB : QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB);
+}
+
 static void pnv_init(MachineState *machine)
 {
     const char *bios_name = machine->firmware ?: FW_FILE_NAME;
@@ -717,6 +734,7 @@ static void pnv_init(MachineState *machine)
     MachineClass *mc = MACHINE_GET_CLASS(machine);
     char *fw_filename;
     long fw_size;
+    uint64_t chip_ram_start = 0;
     int i;
     char *chip_typename;
     DriveInfo *pnor = drive_get(IF_MTD, 0, 0);
@@ -821,17 +839,16 @@ static void pnv_init(MachineState *machine)
         char chip_name[32];
         Object *chip = OBJECT(qdev_new(chip_typename));
         int chip_id = i;
+        uint64_t chip_ram_size =  pnv_chip_get_ram_size(pnv, chip_id);
 
         pnv->chips[i] = PNV_CHIP(chip);
 
-        /*
-         * TODO: put all the memory in one node on chip 0 until we find a
-         * way to specify different ranges for each chip
-         */
-        if (i == 0) {
-            object_property_set_int(chip, "ram-size", machine->ram_size,
-                                    &error_fatal);
-        }
+        /* Distribute RAM among the chips  */
+        object_property_set_int(chip, "ram-start", chip_ram_start,
+                                &error_fatal);
+        object_property_set_int(chip, "ram-size", chip_ram_size,
+                                &error_fatal);
+        chip_ram_start += chip_ram_size;
 
         snprintf(chip_name, sizeof(chip_name), "chip[%d]", chip_id);
         object_property_add_child(OBJECT(pnv), chip_name, chip);
-- 
2.31.1



  parent reply	other threads:[~2021-08-27  7:36 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-27  7:09 [PULL 00/18] ppc-for-6.2 queue 20210827 David Gibson
2021-08-27  7:09 ` [PULL 01/18] xive: Remove extra '0x' prefix in trace events David Gibson
2021-08-27  7:09 ` [PULL 02/18] spapr_pci: Fix leak in spapr_phb_vfio_get_loc_code() with g_autofree David Gibson
2021-08-27  7:09 ` [PULL 03/18] target/ppc: divided mmu_helper.c in 2 files David Gibson
2021-08-27  7:09 ` [PULL 04/18] target/ppc: moved ppc_store_sdr1 to mmu_common.c David Gibson
2021-08-27  7:09 ` [PULL 05/18] target/ppc: moved store_40x_sler to helper_regs.c David Gibson
2021-08-27  7:09 ` [PULL 06/18] ppc/pnv: update skiboot to commit 820d43c0a775 David Gibson
2021-08-27  7:09 ` [PULL 07/18] ppc: Add a POWER10 DD2 CPU David Gibson
2021-08-27  7:09 ` [PULL 08/18] ppc/pnv: Change the POWER10 machine to support DD2 only David Gibson
2021-08-27  7:09 ` [PULL 09/18] ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-saving mode David Gibson
2021-08-27  7:09 ` [PULL 10/18] ppc/pnv: Use a simple incrementing index for the chip-id David Gibson
2021-08-27  7:09 ` David Gibson [this message]
2021-08-27  7:09 ` [PULL 12/18] ppc/pnv: add a chip topology index for POWER10 David Gibson
2021-08-27  7:09 ` [PULL 13/18] ppc/xive: Export PQ get/set routines David Gibson
2021-08-27  7:09 ` [PULL 14/18] ppc/xive: Export xive_presenter_notify() David Gibson
2021-08-27  7:09 ` [PULL 15/18] include/qemu/int128.h: define struct Int128 according to the host endianness David Gibson
2021-08-27  7:09 ` [PULL 16/18] target/ppc: fix vextu[bhw][lr]x helpers David Gibson
2021-08-27  7:09 ` [PULL 17/18] include/qemu/int128.h: introduce bswap128s David Gibson
2021-08-27  7:09 ` [PULL 18/18] target/ppc: fix vector registers access in gdbstub for little-endian David Gibson
2021-08-28 14:13 ` [PULL 00/18] ppc-for-6.2 queue 20210827 Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210827070946.219970-12-david@gibson.dropbear.id.au \
    --to=david@gibson.dropbear.id.au \
    --cc=clg@kaod.org \
    --cc=groug@kaod.org \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).