From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org, groug@kaod.org
Cc: "Lucas Mateus Castro \(alqotel\)" <lucas.araujo@eldorado.org.br>,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [PULL 05/18] target/ppc: moved store_40x_sler to helper_regs.c
Date: Fri, 27 Aug 2021 17:09:33 +1000 [thread overview]
Message-ID: <20210827070946.219970-6-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20210827070946.219970-1-david@gibson.dropbear.id.au>
From: "Lucas Mateus Castro (alqotel)" <lucas.araujo@eldorado.org.br>
moved store_40x_sler from mmu_common.c to helper_regs.c as it is
a function to store a value in a special purpose register, so
moving it to a file focused in special register manipulation
is more appropriate.
Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
Message-Id: <20210723175627.72847-4-lucas.araujo@eldorado.org.br>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
target/ppc/helper_regs.c | 12 ++++++++++++
target/ppc/mmu_common.c | 10 ----------
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
index 3723872aa6..405450d863 100644
--- a/target/ppc/helper_regs.c
+++ b/target/ppc/helper_regs.c
@@ -258,6 +258,18 @@ int hreg_store_msr(CPUPPCState *env, target_ulong value, int alter_hv)
return excp;
}
+#ifdef CONFIG_SOFTMMU
+void store_40x_sler(CPUPPCState *env, uint32_t val)
+{
+ /* XXX: TO BE FIXED */
+ if (val != 0x00000000) {
+ cpu_abort(env_cpu(env),
+ "Little-endian regions are not supported by now\n");
+ }
+ env->spr[SPR_405_SLER] = val;
+}
+#endif /* CONFIG_SOFTMMU */
+
#ifndef CONFIG_USER_ONLY
void check_tlb_flush(CPUPPCState *env, bool global)
{
diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c
index a0518f611b..754509e556 100644
--- a/target/ppc/mmu_common.c
+++ b/target/ppc/mmu_common.c
@@ -622,16 +622,6 @@ static int mmu40x_get_physical_address(CPUPPCState *env, mmu_ctx_t *ctx,
return ret;
}
-void store_40x_sler(CPUPPCState *env, uint32_t val)
-{
- /* XXX: TO BE FIXED */
- if (val != 0x00000000) {
- cpu_abort(env_cpu(env),
- "Little-endian regions are not supported by now\n");
- }
- env->spr[SPR_405_SLER] = val;
-}
-
static int mmubooke_check_tlb(CPUPPCState *env, ppcemb_tlb_t *tlb,
hwaddr *raddr, int *prot, target_ulong address,
MMUAccessType access_type, int i)
--
2.31.1
next prev parent reply other threads:[~2021-08-27 7:13 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-08-27 7:09 [PULL 00/18] ppc-for-6.2 queue 20210827 David Gibson
2021-08-27 7:09 ` [PULL 01/18] xive: Remove extra '0x' prefix in trace events David Gibson
2021-08-27 7:09 ` [PULL 02/18] spapr_pci: Fix leak in spapr_phb_vfio_get_loc_code() with g_autofree David Gibson
2021-08-27 7:09 ` [PULL 03/18] target/ppc: divided mmu_helper.c in 2 files David Gibson
2021-08-27 7:09 ` [PULL 04/18] target/ppc: moved ppc_store_sdr1 to mmu_common.c David Gibson
2021-08-27 7:09 ` David Gibson [this message]
2021-08-27 7:09 ` [PULL 06/18] ppc/pnv: update skiboot to commit 820d43c0a775 David Gibson
2021-08-27 7:09 ` [PULL 07/18] ppc: Add a POWER10 DD2 CPU David Gibson
2021-08-27 7:09 ` [PULL 08/18] ppc/pnv: Change the POWER10 machine to support DD2 only David Gibson
2021-08-27 7:09 ` [PULL 09/18] ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-saving mode David Gibson
2021-08-27 7:09 ` [PULL 10/18] ppc/pnv: Use a simple incrementing index for the chip-id David Gibson
2021-08-27 7:09 ` [PULL 11/18] ppc/pnv: Distribute RAM among the chips David Gibson
2021-08-27 7:09 ` [PULL 12/18] ppc/pnv: add a chip topology index for POWER10 David Gibson
2021-08-27 7:09 ` [PULL 13/18] ppc/xive: Export PQ get/set routines David Gibson
2021-08-27 7:09 ` [PULL 14/18] ppc/xive: Export xive_presenter_notify() David Gibson
2021-08-27 7:09 ` [PULL 15/18] include/qemu/int128.h: define struct Int128 according to the host endianness David Gibson
2021-08-27 7:09 ` [PULL 16/18] target/ppc: fix vextu[bhw][lr]x helpers David Gibson
2021-08-27 7:09 ` [PULL 17/18] include/qemu/int128.h: introduce bswap128s David Gibson
2021-08-27 7:09 ` [PULL 18/18] target/ppc: fix vector registers access in gdbstub for little-endian David Gibson
2021-08-28 14:13 ` [PULL 00/18] ppc-for-6.2 queue 20210827 Peter Maydell
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210827070946.219970-6-david@gibson.dropbear.id.au \
--to=david@gibson.dropbear.id.au \
--cc=groug@kaod.org \
--cc=lucas.araujo@eldorado.org.br \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).