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[83.52.55.163]) by smtp.gmail.com with ESMTPSA id c13sm2120248wru.73.2021.09.02.08.17.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Sep 2021 08:18:00 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 08/24] target/avr: Restrict cpu_exec_interrupt() handler to sysemu Date: Thu, 2 Sep 2021 17:16:59 +0200 Message-Id: <20210902151715.383678-9-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210902151715.383678-1-f4bug@amsat.org> References: <20210902151715.383678-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x333.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bin Meng , Mark Cave-Ayland , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Max Filippov , Alistair Francis , "Edgar E. Iglesias" , Warner Losh , Marek Vasut , Yoshinori Sato , qemu-ppc@nongnu.org, Artyom Tarasenko , Aleksandar Rikalo , Eduardo Habkost , Kyle Evans , Richard Henderson , Greg Kurz , qemu-arm@nongnu.org, Michael Rolnik , Stafford Horne , David Gibson , qemu-riscv@nongnu.org, Chris Wulff , Laurent Vivier , Palmer Dabbelt , Paolo Bonzini , Aurelien Jarno Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Restrict cpu_exec_interrupt() and its callees to sysemu. Signed-off-by: Philippe Mathieu-Daudé --- target/avr/cpu.h | 2 ++ target/avr/cpu.c | 2 +- target/avr/helper.c | 2 ++ 3 files changed, 5 insertions(+), 1 deletion(-) diff --git a/target/avr/cpu.h b/target/avr/cpu.h index 93e3faa0a98..6f8c0ffd770 100644 --- a/target/avr/cpu.h +++ b/target/avr/cpu.h @@ -156,8 +156,10 @@ typedef struct AVRCPU { extern const struct VMStateDescription vms_avr_cpu; +#ifndef CONFIG_USER_ONLY void avr_cpu_do_interrupt(CPUState *cpu); bool avr_cpu_exec_interrupt(CPUState *cpu, int int_req); +#endif /* !CONFIG_USER_ONLY */ hwaddr avr_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int avr_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); int avr_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); diff --git a/target/avr/cpu.c b/target/avr/cpu.c index ea14175ca55..e9fa54c9777 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -195,10 +195,10 @@ static const struct SysemuCPUOps avr_sysemu_ops = { static const struct TCGCPUOps avr_tcg_ops = { .initialize = avr_cpu_tcg_init, .synchronize_from_tb = avr_cpu_synchronize_from_tb, - .cpu_exec_interrupt = avr_cpu_exec_interrupt, .tlb_fill = avr_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY + .cpu_exec_interrupt = avr_cpu_exec_interrupt, .do_interrupt = avr_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ }; diff --git a/target/avr/helper.c b/target/avr/helper.c index 981c29da453..84e366d94a3 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -25,6 +25,7 @@ #include "exec/address-spaces.h" #include "exec/helper-proto.h" +#ifndef CONFIG_USER_ONLY bool avr_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { bool ret = false; @@ -91,6 +92,7 @@ void avr_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; } +#endif /* !CONFIG_USER_ONLY */ int avr_cpu_memory_rw_debug(CPUState *cs, vaddr addr, uint8_t *buf, int len, bool is_write) -- 2.31.1