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[83.52.55.21]) by smtp.gmail.com with ESMTPSA id a133sm3188581wme.5.2021.09.04.16.56.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 04 Sep 2021 16:56:14 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v2 06/24] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Date: Sun, 5 Sep 2021 01:55:24 +0200 Message-Id: <20210904235542.1092641-7-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210904235542.1092641-1-f4bug@amsat.org> References: <20210904235542.1092641-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42b.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Laurent Vivier , Warner Losh , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Restrict cpu_exec_interrupt() and its callees to sysemu. Reviewed-by: Warner Losh Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/alpha/cpu.h | 2 +- target/alpha/cpu.c | 2 +- target/alpha/helper.c | 5 ++--- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 82df108967b..4e993bd15bd 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -274,10 +274,10 @@ struct AlphaCPU { #ifndef CONFIG_USER_ONLY extern const VMStateDescription vmstate_alpha_cpu; -#endif void alpha_cpu_do_interrupt(CPUState *cpu); bool alpha_cpu_exec_interrupt(CPUState *cpu, int int_req); +#endif /* !CONFIG_USER_ONLY */ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags); hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr); int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 4871ad0c0a6..93e16a2ffb4 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -218,10 +218,10 @@ static const struct SysemuCPUOps alpha_sysemu_ops = { static const struct TCGCPUOps alpha_tcg_ops = { .initialize = alpha_translate_init, - .cpu_exec_interrupt = alpha_cpu_exec_interrupt, .tlb_fill = alpha_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY + .cpu_exec_interrupt = alpha_cpu_exec_interrupt, .do_interrupt = alpha_cpu_do_interrupt, .do_transaction_failed = alpha_cpu_do_transaction_failed, .do_unaligned_access = alpha_cpu_do_unaligned_access, diff --git a/target/alpha/helper.c b/target/alpha/helper.c index 4f56fe4d231..81550d9e2ff 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -293,7 +293,6 @@ bool alpha_cpu_tlb_fill(CPUState *cs, vaddr addr, int size, prot, mmu_idx, TARGET_PAGE_SIZE); return true; } -#endif /* USER_ONLY */ void alpha_cpu_do_interrupt(CPUState *cs) { @@ -348,7 +347,6 @@ void alpha_cpu_do_interrupt(CPUState *cs) cs->exception_index = -1; -#if !defined(CONFIG_USER_ONLY) switch (i) { case EXCP_RESET: i = 0x0000; @@ -404,7 +402,6 @@ void alpha_cpu_do_interrupt(CPUState *cs) /* Switch to PALmode. */ env->flags |= ENV_FLAG_PAL_MODE; -#endif /* !USER_ONLY */ } bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) @@ -451,6 +448,8 @@ bool alpha_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } +#endif /* !CONFIG_USER_ONLY */ + void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags) { static const char linux_reg_names[31][4] = { -- 2.31.1