qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [PULL 08/23] hw/arm: Add support for kudo-bmc board.
Date: Mon, 13 Sep 2021 17:11:29 +0100	[thread overview]
Message-ID: <20210913161144.12347-9-peter.maydell@linaro.org> (raw)
In-Reply-To: <20210913161144.12347-1-peter.maydell@linaro.org>

From: Chris Rauer <crauer@google.com>

kudo-bmc is a board supported by OpenBMC.
https://github.com/openbmc/openbmc/tree/master/meta-fii/meta-kudo

Since v1:
- hyphenated Cortex-A9

Tested: Booted kudo firmware.
Signed-off-by: Chris Rauer <crauer@google.com>
Reviewed-by: Patrick Venture <venture@google.com>
Message-id: 20210907223234.1165705-1-crauer@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 docs/system/arm/nuvoton.rst |  1 +
 hw/arm/npcm7xx_boards.c     | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 35 insertions(+)

diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst
index 69f57c2886f..adf497e6791 100644
--- a/docs/system/arm/nuvoton.rst
+++ b/docs/system/arm/nuvoton.rst
@@ -20,6 +20,7 @@ Hyperscale applications. The following machines are based on this chip :
 
 - ``quanta-gbs-bmc``    Quanta GBS server BMC
 - ``quanta-gsj``        Quanta GSJ server BMC
+- ``kudo-bmc``          Fii USA Kudo server BMC
 
 There are also two more SoCs, NPCM710 and NPCM705, which are single-core
 variants of NPCM750 and NPCM730, respectively. These are currently not
diff --git a/hw/arm/npcm7xx_boards.c b/hw/arm/npcm7xx_boards.c
index e5a32439954..a656169f61e 100644
--- a/hw/arm/npcm7xx_boards.c
+++ b/hw/arm/npcm7xx_boards.c
@@ -31,6 +31,7 @@
 #define NPCM750_EVB_POWER_ON_STRAPS 0x00001ff7
 #define QUANTA_GSJ_POWER_ON_STRAPS 0x00001fff
 #define QUANTA_GBS_POWER_ON_STRAPS 0x000017ff
+#define KUDO_BMC_POWER_ON_STRAPS 0x00001fff
 
 static const char npcm7xx_default_bootrom[] = "npcm7xx_bootrom.bin";
 
@@ -357,6 +358,23 @@ static void quanta_gbs_init(MachineState *machine)
     npcm7xx_load_kernel(machine, soc);
 }
 
+static void kudo_bmc_init(MachineState *machine)
+{
+    NPCM7xxState *soc;
+
+    soc = npcm7xx_create_soc(machine, KUDO_BMC_POWER_ON_STRAPS);
+    npcm7xx_connect_dram(soc, machine->ram);
+    qdev_realize(DEVICE(soc), NULL, &error_fatal);
+
+    npcm7xx_load_bootrom(machine, soc);
+    npcm7xx_connect_flash(&soc->fiu[0], 0, "mx66u51235f",
+                          drive_get(IF_MTD, 0, 0));
+    npcm7xx_connect_flash(&soc->fiu[1], 0, "mx66u51235f",
+                          drive_get(IF_MTD, 3, 0));
+
+    npcm7xx_load_kernel(machine, soc);
+}
+
 static void npcm7xx_set_soc_type(NPCM7xxMachineClass *nmc, const char *type)
 {
     NPCM7xxClass *sc = NPCM7XX_CLASS(object_class_by_name(type));
@@ -417,6 +435,18 @@ static void gbs_bmc_machine_class_init(ObjectClass *oc, void *data)
     mc->default_ram_size = 1 * GiB;
 }
 
+static void kudo_bmc_machine_class_init(ObjectClass *oc, void *data)
+{
+    NPCM7xxMachineClass *nmc = NPCM7XX_MACHINE_CLASS(oc);
+    MachineClass *mc = MACHINE_CLASS(oc);
+
+    npcm7xx_set_soc_type(nmc, TYPE_NPCM730);
+
+    mc->desc = "Kudo BMC (Cortex-A9)";
+    mc->init = kudo_bmc_init;
+    mc->default_ram_size = 1 * GiB;
+};
+
 static const TypeInfo npcm7xx_machine_types[] = {
     {
         .name           = TYPE_NPCM7XX_MACHINE,
@@ -437,6 +467,10 @@ static const TypeInfo npcm7xx_machine_types[] = {
         .name           = MACHINE_TYPE_NAME("quanta-gbs-bmc"),
         .parent         = TYPE_NPCM7XX_MACHINE,
         .class_init     = gbs_bmc_machine_class_init,
+    }, {
+        .name           = MACHINE_TYPE_NAME("kudo-bmc"),
+        .parent         = TYPE_NPCM7XX_MACHINE,
+        .class_init     = kudo_bmc_machine_class_init,
     },
 };
 
-- 
2.20.1



  parent reply	other threads:[~2021-09-13 16:26 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-13 16:11 [PULL 00/23] target-arm queue Peter Maydell
2021-09-13 16:11 ` [PULL 01/23] hw/misc: zynq_slcr: Correctly compute output clocks in the reset exit phase Peter Maydell
2021-09-13 16:11 ` [PULL 02/23] hw/char: cadence_uart: Disable transmit when input clock is disabled Peter Maydell
2021-09-13 16:11 ` [PULL 03/23] hw/char: cadence_uart: Move clock/reset check to uart_can_receive() Peter Maydell
2021-09-13 16:11 ` [PULL 04/23] hw/char: cadence_uart: Convert to memop_with_attrs() ops Peter Maydell
2021-09-13 16:11 ` [PULL 05/23] hw/char: cadence_uart: Ignore access when unclocked or in reset for uart_{read, write}() Peter Maydell
2021-09-13 16:11 ` [PULL 06/23] hw/char: cadence_uart: Log a guest error when device is unclocked or in reset Peter Maydell
2021-09-13 16:11 ` [PULL 07/23] hw/arm/virt: KVM: Probe for KVM_CAP_ARM_VM_IPA_SIZE when creating scratch VM Peter Maydell
2021-09-13 16:11 ` Peter Maydell [this message]
2021-09-13 16:11 ` [PULL 09/23] hw/intc: GICv3 ITS initial framework Peter Maydell
2021-09-13 16:11 ` [PULL 10/23] hw/intc: GICv3 ITS register definitions added Peter Maydell
2021-09-13 16:11 ` [PULL 11/23] hw/intc: GICv3 ITS command queue framework Peter Maydell
2021-09-13 16:11 ` [PULL 12/23] hw/intc: GICv3 ITS Command processing Peter Maydell
2021-09-13 16:11 ` [PULL 13/23] hw/intc: GICv3 ITS Feature enablement Peter Maydell
2021-09-13 16:11 ` [PULL 14/23] hw/intc: GICv3 redistributor ITS processing Peter Maydell
2021-09-13 16:11 ` [PULL 15/23] tests/data/acpi/virt: Add IORT files for ITS Peter Maydell
2021-09-13 16:11 ` [PULL 16/23] hw/arm/virt: add ITS support in virt GIC Peter Maydell
2021-09-13 16:11 ` [PULL 17/23] tests/data/acpi/virt: Update IORT files for ITS Peter Maydell
2021-09-13 16:11 ` [PULL 18/23] target/arm: Take an exception if PSTATE.IL is set Peter Maydell
2021-09-13 16:11 ` [PULL 19/23] target/arm: Merge disas_a64_insn into aarch64_tr_translate_insn Peter Maydell
2021-09-13 16:11 ` [PULL 20/23] qdev: Support marking individual buses as 'full' Peter Maydell
2021-09-13 16:11 ` [PULL 21/23] hw/arm/mps2-tz.c: Add extra data parameter to MakeDevFn Peter Maydell
2021-09-13 16:11 ` [PULL 22/23] hw/arm/mps2-tz.c: Mark internal-only I2C buses as 'full' Peter Maydell
2021-09-13 16:11 ` [PULL 23/23] hw/arm/mps2.c: " Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20210913161144.12347-9-peter.maydell@linaro.org \
    --to=peter.maydell@linaro.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).