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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Warner Losh" <imp@bsdimp.com>
Subject: [PULL 17/44] target/hppa: Restrict cpu_exec_interrupt() handler to sysemu
Date: Mon, 13 Sep 2021 17:14:29 -0700	[thread overview]
Message-ID: <20210914001456.793490-18-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210914001456.793490-1-richard.henderson@linaro.org>

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210911165434.531552-10-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/hppa/cpu.h        | 4 ++--
 target/hppa/cpu.c        | 2 +-
 target/hppa/int_helper.c | 7 ++-----
 3 files changed, 5 insertions(+), 8 deletions(-)

diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 748270bfa3..7854675b90 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -325,13 +325,13 @@ int cpu_hppa_signal_handler(int host_signum, void *pinfo, void *puc);
 hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr);
 int hppa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void hppa_cpu_do_interrupt(CPUState *cpu);
-bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
 void hppa_cpu_dump_state(CPUState *cs, FILE *f, int);
 bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                        MMUAccessType access_type, int mmu_idx,
                        bool probe, uintptr_t retaddr);
 #ifndef CONFIG_USER_ONLY
+void hppa_cpu_do_interrupt(CPUState *cpu);
+bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
 int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
                               int type, hwaddr *pphys, int *pprot);
 extern const MemoryRegionOps hppa_io_eir_ops;
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 2eace4ee12..e8edd189bf 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -144,10 +144,10 @@ static const struct SysemuCPUOps hppa_sysemu_ops = {
 static const struct TCGCPUOps hppa_tcg_ops = {
     .initialize = hppa_translate_init,
     .synchronize_from_tb = hppa_cpu_synchronize_from_tb,
-    .cpu_exec_interrupt = hppa_cpu_exec_interrupt,
     .tlb_fill = hppa_cpu_tlb_fill,
 
 #ifndef CONFIG_USER_ONLY
+    .cpu_exec_interrupt = hppa_cpu_exec_interrupt,
     .do_interrupt = hppa_cpu_do_interrupt,
     .do_unaligned_access = hppa_cpu_do_unaligned_access,
 #endif /* !CONFIG_USER_ONLY */
diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c
index 349495d361..13073ae2bd 100644
--- a/target/hppa/int_helper.c
+++ b/target/hppa/int_helper.c
@@ -88,7 +88,6 @@ void HELPER(write_eiem)(CPUHPPAState *env, target_ureg val)
     eval_interrupt(env_archcpu(env));
     qemu_mutex_unlock_iothread();
 }
-#endif /* !CONFIG_USER_ONLY */
 
 void hppa_cpu_do_interrupt(CPUState *cs)
 {
@@ -100,7 +99,6 @@ void hppa_cpu_do_interrupt(CPUState *cs)
     uint64_t iasq_f = env->iasq_f;
     uint64_t iasq_b = env->iasq_b;
 
-#ifndef CONFIG_USER_ONLY
     target_ureg old_psw;
 
     /* As documented in pa2.0 -- interruption handling.  */
@@ -187,7 +185,6 @@ void hppa_cpu_do_interrupt(CPUState *cs)
     env->iaoq_b = env->iaoq_f + 4;
     env->iasq_f = 0;
     env->iasq_b = 0;
-#endif
 
     if (qemu_loglevel_mask(CPU_LOG_INT)) {
         static const char * const names[] = {
@@ -248,7 +245,6 @@ void hppa_cpu_do_interrupt(CPUState *cs)
 
 bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
-#ifndef CONFIG_USER_ONLY
     HPPACPU *cpu = HPPA_CPU(cs);
     CPUHPPAState *env = &cpu->env;
 
@@ -258,6 +254,7 @@ bool hppa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
         hppa_cpu_do_interrupt(cs);
         return true;
     }
-#endif
     return false;
 }
+
+#endif /* !CONFIG_USER_ONLY */
-- 
2.25.1



  parent reply	other threads:[~2021-09-14  0:27 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-14  0:14 [PULL 00/44] tcg patch queue, v2 Richard Henderson
2021-09-14  0:14 ` [PULL 01/44] accel/tcg: Add DisasContextBase argument to translator_ld* Richard Henderson
2021-09-14  0:14 ` [PULL 02/44] accel/tcg: Clear PAGE_WRITE before translation Richard Henderson
2021-09-14  0:14 ` [PULL 03/44] tcg/i386: Split P_VEXW from P_REXW Richard Henderson
2021-09-14  0:14 ` [PULL 04/44] accel/tcg: remove redundant TCG_KICK_PERIOD define Richard Henderson
2021-09-14  0:14 ` [PULL 05/44] tcg: Remove tcg_global_reg_new defines Richard Henderson
2021-09-14  0:14 ` [PULL 06/44] tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWIN Richard Henderson
2021-09-14  0:14 ` [PULL 07/44] tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF Richard Henderson
2021-09-14  0:14 ` [PULL 08/44] tcg/arm: Fix tcg_out_vec_op function signature Richard Henderson
2021-09-14  0:14 ` [PULL 09/44] target/avr: Remove pointless use of CONFIG_USER_ONLY definition Richard Henderson
2021-09-14  0:14 ` [PULL 10/44] target/i386: Restrict sysemu-only fpu_helper helpers Richard Henderson
2021-09-14  0:14 ` [PULL 11/44] target/i386: Simplify TARGET_X86_64 #ifdef'ry Richard Henderson
2021-09-14  0:14 ` [PULL 12/44] target/xtensa: Restrict do_transaction_failed() to sysemu Richard Henderson
2021-09-14  0:14 ` [PULL 13/44] accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt Richard Henderson
2021-09-14  0:14 ` [PULL 14/44] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Richard Henderson
2021-09-14  0:14 ` [PULL 15/44] target/arm: " Richard Henderson
2021-09-14  0:14 ` [PULL 16/44] target/cris: " Richard Henderson
2021-09-14  0:14 ` Richard Henderson [this message]
2021-09-14  0:14 ` [PULL 18/44] target/i386: " Richard Henderson
2021-09-14  0:14 ` [PULL 19/44] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder Richard Henderson
2021-09-14  0:14 ` [PULL 20/44] target/m68k: Restrict cpu_exec_interrupt() handler to sysemu Richard Henderson
2021-09-14  0:14 ` [PULL 21/44] target/microblaze: " Richard Henderson
2021-09-14  0:14 ` [PULL 22/44] target/mips: " Richard Henderson
2021-09-14  0:14 ` [PULL 23/44] target/nios2: " Richard Henderson
2021-09-14  0:14 ` [PULL 24/44] target/openrisc: " Richard Henderson
2021-09-14  0:14 ` [PULL 25/44] target/ppc: " Richard Henderson
2021-09-14  0:14 ` [PULL 26/44] target/riscv: " Richard Henderson
2021-09-14  0:14 ` [PULL 27/44] target/sh4: " Richard Henderson
2021-09-14  0:14 ` [PULL 28/44] target/sparc: " Richard Henderson
2021-09-14  0:14 ` [PULL 29/44] target/rx: " Richard Henderson
2021-09-14  0:14 ` [PULL 30/44] target/xtensa: " Richard Henderson
2021-09-14  0:14 ` [PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() " Richard Henderson
2021-09-14  0:14 ` [PULL 32/44] user: Remove cpu_get_pic_interrupt() stubs Richard Henderson
2021-09-14  0:14 ` [PULL 33/44] user: Mark cpu_loop() with noreturn attribute Richard Henderson
2021-09-14  0:14 ` [PULL 34/44] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts Richard Henderson
2021-09-14  0:14 ` [PULL 35/44] tcg/arm: Remove fallback definition of __ARM_ARCH Richard Henderson
2021-09-14  5:58   ` Philippe Mathieu-Daudé
2021-09-14  0:14 ` [PULL 36/44] tcg/arm: Standardize on tcg_out_<branch>_{reg,imm} Richard Henderson
2021-09-14  0:14 ` [PULL 37/44] tcg/arm: Simplify use_armv5t_instructions Richard Henderson
2021-09-14  0:14 ` [PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call Richard Henderson
2021-09-14  0:14 ` [PULL 39/44] tcg/arm: Split out tcg_out_ldstm Richard Henderson
2021-09-14  0:14 ` [PULL 40/44] tcg/arm: Simplify usage of encode_imm Richard Henderson
2021-09-14  0:14 ` [PULL 41/44] tcg/arm: Drop inline markers Richard Henderson
2021-09-14  0:14 ` [PULL 42/44] tcg/arm: Give enum arm_cond_code_e a typedef and use it Richard Henderson
2021-09-14  0:14 ` [PULL 43/44] tcg/arm: More use of the ARMInsn enum Richard Henderson
2021-09-14  0:14 ` [PULL 44/44] tcg/arm: More use of the TCGReg enum Richard Henderson
2021-09-14 12:39 ` [PULL 00/44] tcg patch queue, v2 Peter Maydell

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