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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
	"Warner Losh" <imp@bsdimp.com>,
	"David Gibson" <david@gibson.dropbear.id.au>
Subject: [PULL 25/44] target/ppc: Restrict cpu_exec_interrupt() handler to sysemu
Date: Mon, 13 Sep 2021 17:14:37 -0700	[thread overview]
Message-ID: <20210914001456.793490-26-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210914001456.793490-1-richard.henderson@linaro.org>

From: Philippe Mathieu-Daudé <f4bug@amsat.org>

Restrict cpu_exec_interrupt() and its callees to sysemu.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <20210911165434.531552-18-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/ppc/cpu.h         |  4 ++--
 target/ppc/cpu_init.c    |  2 +-
 target/ppc/excp_helper.c | 21 +++------------------
 3 files changed, 6 insertions(+), 21 deletions(-)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 500205229c..362e7c4c5c 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1254,8 +1254,6 @@ DECLARE_OBJ_CHECKERS(PPCVirtualHypervisor, PPCVirtualHypervisorClass,
                      PPC_VIRTUAL_HYPERVISOR, TYPE_PPC_VIRTUAL_HYPERVISOR)
 #endif /* CONFIG_USER_ONLY */
 
-void ppc_cpu_do_interrupt(CPUState *cpu);
-bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
 void ppc_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 hwaddr ppc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 int ppc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
@@ -1271,6 +1269,8 @@ int ppc64_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cs,
 int ppc32_cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cs,
                                int cpuid, void *opaque);
 #ifndef CONFIG_USER_ONLY
+void ppc_cpu_do_interrupt(CPUState *cpu);
+bool ppc_cpu_exec_interrupt(CPUState *cpu, int int_req);
 void ppc_cpu_do_system_reset(CPUState *cs);
 void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector);
 extern const VMStateDescription vmstate_ppc_cpu;
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index ad7abc6041..6aad01d1d3 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -9014,10 +9014,10 @@ static const struct SysemuCPUOps ppc_sysemu_ops = {
 
 static const struct TCGCPUOps ppc_tcg_ops = {
   .initialize = ppc_translate_init,
-  .cpu_exec_interrupt = ppc_cpu_exec_interrupt,
   .tlb_fill = ppc_cpu_tlb_fill,
 
 #ifndef CONFIG_USER_ONLY
+  .cpu_exec_interrupt = ppc_cpu_exec_interrupt,
   .do_interrupt = ppc_cpu_do_interrupt,
   .cpu_exec_enter = ppc_cpu_exec_enter,
   .cpu_exec_exit = ppc_cpu_exec_exit,
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 7b6ac16eef..d7e32ee107 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -40,24 +40,8 @@
 
 /*****************************************************************************/
 /* Exception processing */
-#if defined(CONFIG_USER_ONLY)
-void ppc_cpu_do_interrupt(CPUState *cs)
-{
-    PowerPCCPU *cpu = POWERPC_CPU(cs);
-    CPUPPCState *env = &cpu->env;
+#if !defined(CONFIG_USER_ONLY)
 
-    cs->exception_index = POWERPC_EXCP_NONE;
-    env->error_code = 0;
-}
-
-static void ppc_hw_interrupt(CPUPPCState *env)
-{
-    CPUState *cs = env_cpu(env);
-
-    cs->exception_index = POWERPC_EXCP_NONE;
-    env->error_code = 0;
-}
-#else /* defined(CONFIG_USER_ONLY) */
 static inline void dump_syscall(CPUPPCState *env)
 {
     qemu_log_mask(CPU_LOG_INT, "syscall r0=%016" PRIx64
@@ -1113,7 +1097,6 @@ void ppc_cpu_do_fwnmi_machine_check(CPUState *cs, target_ulong vector)
 
     powerpc_set_excp_state(cpu, vector, msr);
 }
-#endif /* !CONFIG_USER_ONLY */
 
 bool ppc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 {
@@ -1130,6 +1113,8 @@ bool ppc_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
     return false;
 }
 
+#endif /* !CONFIG_USER_ONLY */
+
 #if defined(DEBUG_OP)
 static void cpu_dump_rfi(target_ulong RA, target_ulong msr)
 {
-- 
2.25.1



  parent reply	other threads:[~2021-09-14  0:55 UTC|newest]

Thread overview: 47+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-14  0:14 [PULL 00/44] tcg patch queue, v2 Richard Henderson
2021-09-14  0:14 ` [PULL 01/44] accel/tcg: Add DisasContextBase argument to translator_ld* Richard Henderson
2021-09-14  0:14 ` [PULL 02/44] accel/tcg: Clear PAGE_WRITE before translation Richard Henderson
2021-09-14  0:14 ` [PULL 03/44] tcg/i386: Split P_VEXW from P_REXW Richard Henderson
2021-09-14  0:14 ` [PULL 04/44] accel/tcg: remove redundant TCG_KICK_PERIOD define Richard Henderson
2021-09-14  0:14 ` [PULL 05/44] tcg: Remove tcg_global_reg_new defines Richard Henderson
2021-09-14  0:14 ` [PULL 06/44] tcg/ppc: Replace TCG_TARGET_CALL_DARWIN with _CALL_DARWIN Richard Henderson
2021-09-14  0:14 ` [PULL 07/44] tcg/ppc: Ensure _CALL_SYSV is set for 32-bit ELF Richard Henderson
2021-09-14  0:14 ` [PULL 08/44] tcg/arm: Fix tcg_out_vec_op function signature Richard Henderson
2021-09-14  0:14 ` [PULL 09/44] target/avr: Remove pointless use of CONFIG_USER_ONLY definition Richard Henderson
2021-09-14  0:14 ` [PULL 10/44] target/i386: Restrict sysemu-only fpu_helper helpers Richard Henderson
2021-09-14  0:14 ` [PULL 11/44] target/i386: Simplify TARGET_X86_64 #ifdef'ry Richard Henderson
2021-09-14  0:14 ` [PULL 12/44] target/xtensa: Restrict do_transaction_failed() to sysemu Richard Henderson
2021-09-14  0:14 ` [PULL 13/44] accel/tcg: Rename user-mode do_interrupt hack as fake_user_interrupt Richard Henderson
2021-09-14  0:14 ` [PULL 14/44] target/alpha: Restrict cpu_exec_interrupt() handler to sysemu Richard Henderson
2021-09-14  0:14 ` [PULL 15/44] target/arm: " Richard Henderson
2021-09-14  0:14 ` [PULL 16/44] target/cris: " Richard Henderson
2021-09-14  0:14 ` [PULL 17/44] target/hppa: " Richard Henderson
2021-09-14  0:14 ` [PULL 18/44] target/i386: " Richard Henderson
2021-09-14  0:14 ` [PULL 19/44] target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder Richard Henderson
2021-09-14  0:14 ` [PULL 20/44] target/m68k: Restrict cpu_exec_interrupt() handler to sysemu Richard Henderson
2021-09-14  0:14 ` [PULL 21/44] target/microblaze: " Richard Henderson
2021-09-14  0:14 ` [PULL 22/44] target/mips: " Richard Henderson
2021-09-14  0:14 ` [PULL 23/44] target/nios2: " Richard Henderson
2021-09-14  0:14 ` [PULL 24/44] target/openrisc: " Richard Henderson
2021-09-14  0:14 ` Richard Henderson [this message]
2021-09-14  0:14 ` [PULL 26/44] target/riscv: " Richard Henderson
2021-09-14  0:14 ` [PULL 27/44] target/sh4: " Richard Henderson
2021-09-14  0:14 ` [PULL 28/44] target/sparc: " Richard Henderson
2021-09-14  0:14 ` [PULL 29/44] target/rx: " Richard Henderson
2021-09-14  0:14 ` [PULL 30/44] target/xtensa: " Richard Henderson
2021-09-14  0:14 ` [PULL 31/44] accel/tcg: Restrict TCGCPUOps::cpu_exec_interrupt() " Richard Henderson
2021-09-14  0:14 ` [PULL 32/44] user: Remove cpu_get_pic_interrupt() stubs Richard Henderson
2021-09-14  0:14 ` [PULL 33/44] user: Mark cpu_loop() with noreturn attribute Richard Henderson
2021-09-14  0:14 ` [PULL 34/44] accel/tcg/user-exec: Fix read-modify-write of code on s390 hosts Richard Henderson
2021-09-14  0:14 ` [PULL 35/44] tcg/arm: Remove fallback definition of __ARM_ARCH Richard Henderson
2021-09-14  5:58   ` Philippe Mathieu-Daudé
2021-09-14  0:14 ` [PULL 36/44] tcg/arm: Standardize on tcg_out_<branch>_{reg,imm} Richard Henderson
2021-09-14  0:14 ` [PULL 37/44] tcg/arm: Simplify use_armv5t_instructions Richard Henderson
2021-09-14  0:14 ` [PULL 38/44] tcg/arm: Support armv4t in tcg_out_goto and tcg_out_call Richard Henderson
2021-09-14  0:14 ` [PULL 39/44] tcg/arm: Split out tcg_out_ldstm Richard Henderson
2021-09-14  0:14 ` [PULL 40/44] tcg/arm: Simplify usage of encode_imm Richard Henderson
2021-09-14  0:14 ` [PULL 41/44] tcg/arm: Drop inline markers Richard Henderson
2021-09-14  0:14 ` [PULL 42/44] tcg/arm: Give enum arm_cond_code_e a typedef and use it Richard Henderson
2021-09-14  0:14 ` [PULL 43/44] tcg/arm: More use of the ARMInsn enum Richard Henderson
2021-09-14  0:14 ` [PULL 44/44] tcg/arm: More use of the TCGReg enum Richard Henderson
2021-09-14 12:39 ` [PULL 00/44] tcg patch queue, v2 Peter Maydell

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