[PATCH v2 43/53] target/i386: convert to use format_tlb callback

["Daniel P. Berrangé" <berrange@redhat.com>]

Change the "info tlb" implementation to use the format_tlb callback.

Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
---
 target/i386/cpu.c     |   3 ++
 target/i386/cpu.h     |   1 +
 target/i386/monitor.c | 107 +++++++++++++++++++++++-------------------
 3 files changed, 63 insertions(+), 48 deletions(-)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 0a5c6a6d19..ab86224ee2 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -6765,6 +6765,9 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
     cc->parse_features = x86_cpu_parse_featurestr;
     cc->has_work = x86_cpu_has_work;
     cc->format_state = x86_cpu_format_state;
+#ifndef CONFIG_USER_ONLY
+    cc->format_tlb = x86_cpu_format_tlb;
+#endif
     cc->set_pc = x86_cpu_set_pc;
     cc->gdb_read_register = x86_cpu_gdb_read_register;
     cc->gdb_write_register = x86_cpu_gdb_write_register;
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 2bcb175da8..d61eeef617 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1826,6 +1826,7 @@ void x86_cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list,
                                 Error **errp);
 
 void x86_cpu_format_state(CPUState *cs, GString *buf, int flags);
+void x86_cpu_format_tlb(CPUState *cpu, GString *buf);
 
 hwaddr x86_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
                                          MemTxAttrs *attrs);
diff --git a/target/i386/monitor.c b/target/i386/monitor.c
index fc09f90059..698fbbc80b 100644
--- a/target/i386/monitor.c
+++ b/target/i386/monitor.c
@@ -54,27 +54,27 @@ static hwaddr addr_canonical(CPUArchState *env, hwaddr addr)
     return addr;
 }
 
-static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr,
-                      hwaddr pte, hwaddr mask)
+static void format_pte(GString *buf, CPUArchState *env, hwaddr addr,
+                       hwaddr pte, hwaddr mask)
 {
     addr = addr_canonical(env, addr);
 
-    monitor_printf(mon, TARGET_FMT_plx ": " TARGET_FMT_plx
-                   " %c%c%c%c%c%c%c%c%c\n",
-                   addr,
-                   pte & mask,
-                   pte & PG_NX_MASK ? 'X' : '-',
-                   pte & PG_GLOBAL_MASK ? 'G' : '-',
-                   pte & PG_PSE_MASK ? 'P' : '-',
-                   pte & PG_DIRTY_MASK ? 'D' : '-',
-                   pte & PG_ACCESSED_MASK ? 'A' : '-',
-                   pte & PG_PCD_MASK ? 'C' : '-',
-                   pte & PG_PWT_MASK ? 'T' : '-',
-                   pte & PG_USER_MASK ? 'U' : '-',
-                   pte & PG_RW_MASK ? 'W' : '-');
+    g_string_append_printf(buf, TARGET_FMT_plx ": " TARGET_FMT_plx
+                           " %c%c%c%c%c%c%c%c%c\n",
+                           addr,
+                           pte & mask,
+                           pte & PG_NX_MASK ? 'X' : '-',
+                           pte & PG_GLOBAL_MASK ? 'G' : '-',
+                           pte & PG_PSE_MASK ? 'P' : '-',
+                           pte & PG_DIRTY_MASK ? 'D' : '-',
+                           pte & PG_ACCESSED_MASK ? 'A' : '-',
+                           pte & PG_PCD_MASK ? 'C' : '-',
+                           pte & PG_PWT_MASK ? 'T' : '-',
+                           pte & PG_USER_MASK ? 'U' : '-',
+                           pte & PG_RW_MASK ? 'W' : '-');
 }
 
-static void tlb_info_32(Monitor *mon, CPUArchState *env)
+static void tlb_info_32(GString *buf, CPUArchState *env)
 {
     unsigned int l1, l2;
     uint32_t pgd, pde, pte;
@@ -86,15 +86,15 @@ static void tlb_info_32(Monitor *mon, CPUArchState *env)
         if (pde & PG_PRESENT_MASK) {
             if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
                 /* 4M pages */
-                print_pte(mon, env, (l1 << 22), pde, ~((1 << 21) - 1));
+                format_pte(buf, env, (l1 << 22), pde, ~((1 << 21) - 1));
             } else {
                 for(l2 = 0; l2 < 1024; l2++) {
                     cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte, 4);
                     pte = le32_to_cpu(pte);
                     if (pte & PG_PRESENT_MASK) {
-                        print_pte(mon, env, (l1 << 22) + (l2 << 12),
-                                  pte & ~PG_PSE_MASK,
-                                  ~0xfff);
+                        format_pte(buf, env, (l1 << 22) + (l2 << 12),
+                                   pte & ~PG_PSE_MASK,
+                                   ~0xfff);
                     }
                 }
             }
@@ -102,7 +102,7 @@ static void tlb_info_32(Monitor *mon, CPUArchState *env)
     }
 }
 
-static void tlb_info_pae32(Monitor *mon, CPUArchState *env)
+static void tlb_info_pae32(GString *buf, CPUArchState *env)
 {
     unsigned int l1, l2, l3;
     uint64_t pdpe, pde, pte;
@@ -120,18 +120,18 @@ static void tlb_info_pae32(Monitor *mon, CPUArchState *env)
                 if (pde & PG_PRESENT_MASK) {
                     if (pde & PG_PSE_MASK) {
                         /* 2M pages with PAE, CR4.PSE is ignored */
-                        print_pte(mon, env, (l1 << 30) + (l2 << 21), pde,
-                                  ~((hwaddr)(1 << 20) - 1));
+                        format_pte(buf, env, (l1 << 30) + (l2 << 21), pde,
+                                   ~((hwaddr)(1 << 20) - 1));
                     } else {
                         pt_addr = pde & 0x3fffffffff000ULL;
                         for (l3 = 0; l3 < 512; l3++) {
                             cpu_physical_memory_read(pt_addr + l3 * 8, &pte, 8);
                             pte = le64_to_cpu(pte);
                             if (pte & PG_PRESENT_MASK) {
-                                print_pte(mon, env, (l1 << 30) + (l2 << 21)
-                                          + (l3 << 12),
-                                          pte & ~PG_PSE_MASK,
-                                          ~(hwaddr)0xfff);
+                                format_pte(buf, env, (l1 << 30) + (l2 << 21)
+                                           + (l3 << 12),
+                                           pte & ~PG_PSE_MASK,
+                                           ~(hwaddr)0xfff);
                             }
                         }
                     }
@@ -142,7 +142,7 @@ static void tlb_info_pae32(Monitor *mon, CPUArchState *env)
 }
 
 #ifdef TARGET_X86_64
-static void tlb_info_la48(Monitor *mon, CPUArchState *env,
+static void tlb_info_la48(GString *buf, CPUArchState *env,
         uint64_t l0, uint64_t pml4_addr)
 {
     uint64_t l1, l2, l3, l4;
@@ -166,8 +166,8 @@ static void tlb_info_la48(Monitor *mon, CPUArchState *env,
 
             if (pdpe & PG_PSE_MASK) {
                 /* 1G pages, CR4.PSE is ignored */
-                print_pte(mon, env, (l0 << 48) + (l1 << 39) + (l2 << 30),
-                        pdpe, 0x3ffffc0000000ULL);
+                format_pte(buf, env, (l0 << 48) + (l1 << 39) + (l2 << 30),
+                           pdpe, 0x3ffffc0000000ULL);
                 continue;
             }
 
@@ -181,8 +181,8 @@ static void tlb_info_la48(Monitor *mon, CPUArchState *env,
 
                 if (pde & PG_PSE_MASK) {
                     /* 2M pages, CR4.PSE is ignored */
-                    print_pte(mon, env, (l0 << 48) + (l1 << 39) + (l2 << 30) +
-                            (l3 << 21), pde, 0x3ffffffe00000ULL);
+                    format_pte(buf, env, (l0 << 48) + (l1 << 39) + (l2 << 30) +
+                               (l3 << 21), pde, 0x3ffffffe00000ULL);
                     continue;
                 }
 
@@ -193,9 +193,9 @@ static void tlb_info_la48(Monitor *mon, CPUArchState *env,
                             &pte, 8);
                     pte = le64_to_cpu(pte);
                     if (pte & PG_PRESENT_MASK) {
-                        print_pte(mon, env, (l0 << 48) + (l1 << 39) +
-                                (l2 << 30) + (l3 << 21) + (l4 << 12),
-                                pte & ~PG_PSE_MASK, 0x3fffffffff000ULL);
+                        format_pte(buf, env, (l0 << 48) + (l1 << 39) +
+                                   (l2 << 30) + (l3 << 21) + (l4 << 12),
+                                   pte & ~PG_PSE_MASK, 0x3fffffffff000ULL);
                     }
                 }
             }
@@ -203,7 +203,7 @@ static void tlb_info_la48(Monitor *mon, CPUArchState *env,
     }
 }
 
-static void tlb_info_la57(Monitor *mon, CPUArchState *env)
+static void tlb_info_la57(GString *buf, CPUArchState *env)
 {
     uint64_t l0;
     uint64_t pml5e;
@@ -214,44 +214,55 @@ static void tlb_info_la57(Monitor *mon, CPUArchState *env)
         cpu_physical_memory_read(pml5_addr + l0 * 8, &pml5e, 8);
         pml5e = le64_to_cpu(pml5e);
         if (pml5e & PG_PRESENT_MASK) {
-            tlb_info_la48(mon, env, l0, pml5e & 0x3fffffffff000ULL);
+            tlb_info_la48(buf, env, l0, pml5e & 0x3fffffffff000ULL);
         }
     }
 }
 #endif /* TARGET_X86_64 */
 
-void hmp_info_tlb(Monitor *mon, const QDict *qdict)
+void x86_cpu_format_tlb(CPUState *cpu, GString *buf)
 {
     CPUArchState *env;
 
-    env = mon_get_cpu_env(mon);
-    if (!env) {
-        monitor_printf(mon, "No CPU available\n");
-        return;
-    }
+    env = cpu->env_ptr;
 
     if (!(env->cr[0] & CR0_PG_MASK)) {
-        monitor_printf(mon, "PG disabled\n");
+        g_string_append_printf(buf, "PG disabled\n");
         return;
     }
     if (env->cr[4] & CR4_PAE_MASK) {
 #ifdef TARGET_X86_64
         if (env->hflags & HF_LMA_MASK) {
             if (env->cr[4] & CR4_LA57_MASK) {
-                tlb_info_la57(mon, env);
+                tlb_info_la57(buf, env);
             } else {
-                tlb_info_la48(mon, env, 0, env->cr[3] & 0x3fffffffff000ULL);
+                tlb_info_la48(buf, env, 0, env->cr[3] & 0x3fffffffff000ULL);
             }
         } else
 #endif
         {
-            tlb_info_pae32(mon, env);
+            tlb_info_pae32(buf, env);
         }
     } else {
-        tlb_info_32(mon, env);
+        tlb_info_32(buf, env);
     }
 }
 
+void hmp_info_tlb(Monitor *mon, const QDict *qdict)
+{
+    g_autoptr(GString) buf = g_string_new("");
+    CPUState *cpu = mon_get_cpu(mon);
+
+    if (!cpu) {
+        monitor_printf(mon, "No CPU available\n");
+        return;
+    }
+
+    cpu_format_tlb(cpu, buf);
+
+    monitor_printf(mon, "%s", buf->str);
+}
+
 static void mem_print(Monitor *mon, CPUArchState *env,
                       hwaddr *pstart, int *plast_prot,
                       hwaddr end, int prot)
-- 
2.31.1