From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 10/35] target/arm: Restrict has_work() handler to sysemu and TCG
Date: Thu, 16 Sep 2021 08:30:00 -0700 [thread overview]
Message-ID: <20210916153025.1944763-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210916153025.1944763-1-richard.henderson@linaro.org>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Restrict has_work() to TCG sysemu.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210912172731.789788-10-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ba0741b20e..e11aa625a5 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -73,8 +73,8 @@ void arm_cpu_synchronize_from_tb(CPUState *cs,
env->regs[15] = tb->pc;
}
}
-#endif /* CONFIG_TCG */
+#ifndef CONFIG_USER_ONLY
static bool arm_cpu_has_work(CPUState *cs)
{
ARMCPU *cpu = ARM_CPU(cs);
@@ -85,6 +85,9 @@ static bool arm_cpu_has_work(CPUState *cs)
| CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
| CPU_INTERRUPT_EXITTB);
}
+#endif /* !CONFIG_USER_ONLY */
+
+#endif /* CONFIG_TCG */
void arm_register_pre_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
void *opaque)
@@ -2017,6 +2020,7 @@ static const struct TCGCPUOps arm_tcg_ops = {
.debug_excp_handler = arm_debug_excp_handler,
#if !defined(CONFIG_USER_ONLY)
+ .has_work = arm_cpu_has_work,
.cpu_exec_interrupt = arm_cpu_exec_interrupt,
.do_interrupt = arm_cpu_do_interrupt,
.do_transaction_failed = arm_cpu_do_transaction_failed,
@@ -2041,7 +2045,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_reset(dc, arm_cpu_reset, &acc->parent_reset);
cc->class_by_name = arm_cpu_class_by_name;
- cc->has_work = arm_cpu_has_work;
cc->dump_state = arm_cpu_dump_state;
cc->set_pc = arm_cpu_set_pc;
cc->gdb_read_register = arm_cpu_gdb_read_register;
--
2.25.1
next prev parent reply other threads:[~2021-09-16 15:44 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-16 15:29 [PULL 00/35] tcg patch queue Richard Henderson
2021-09-16 15:29 ` [PULL 01/35] include/exec: Move cpu_signal_handler declaration Richard Henderson
2021-09-16 15:29 ` [PULL 02/35] accel/tcg: Restrict cpu_handle_halt() to sysemu Richard Henderson
2021-09-16 15:29 ` [PULL 03/35] hw/core: Restrict cpu_has_work() " Richard Henderson
2021-09-16 15:29 ` [PULL 04/35] hw/core: Un-inline cpu_has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 05/35] sysemu: Introduce AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 06/35] accel/kvm: Implement AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 07/35] accel/whpx: " Richard Henderson
2021-09-16 15:29 ` [PULL 08/35] accel/tcg: Implement AccelOpsClass::has_work() as stub Richard Henderson
2021-09-16 15:29 ` [PULL 09/35] target/alpha: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` Richard Henderson [this message]
2021-09-16 15:30 ` [PULL 11/35] target/avr: " Richard Henderson
2021-09-16 15:30 ` [PULL 12/35] target/cris: " Richard Henderson
2021-09-16 15:30 ` [PULL 13/35] target/hexagon: Remove unused has_work() handler Richard Henderson
2021-09-16 15:30 ` [PULL 14/35] target/hppa: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 15/35] target/i386: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 16/35] target/m68k: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 17/35] target/microblaze: " Richard Henderson
2021-09-16 15:30 ` [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 19/35] target/nios2: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 20/35] target/openrisc: " Richard Henderson
2021-09-16 15:30 ` [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work() Richard Henderson
2021-09-16 15:30 ` [PULL 22/35] target/ppc: Restrict has_work() handlers to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 23/35] target/riscv: Restrict has_work() handler " Richard Henderson
2021-09-16 15:30 ` [PULL 24/35] target/rx: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition Richard Henderson
2021-09-16 15:30 ` [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 29/35] target/tricore: " Richard Henderson
2021-09-16 15:30 ` [PULL 30/35] target/xtensa: " Richard Henderson
2021-09-16 15:30 ` [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Richard Henderson
2021-09-16 15:30 ` [PULL 32/35] tcg/mips: Drop inline markers Richard Henderson
2021-09-16 15:30 ` [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr Richard Henderson
2021-09-16 15:30 ` [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump Richard Henderson
2021-09-16 15:30 ` [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer Richard Henderson
2021-09-20 10:07 ` [PULL 00/35] tcg patch queue Peter Maydell
2021-09-20 12:51 ` Philippe Mathieu-Daudé
2021-09-20 13:14 ` Philippe Mathieu-Daudé
2021-09-20 13:52 ` Philippe Mathieu-Daudé
2021-09-20 21:16 ` Philippe Mathieu-Daudé
2021-09-21 9:28 ` Peter Maydell
2021-09-21 9:41 ` Philippe Mathieu-Daudé
2021-09-21 9:47 ` Peter Maydell
2021-09-20 13:19 ` Richard Henderson
2021-09-21 15:25 ` Peter Maydell
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