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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer
Date: Thu, 16 Sep 2021 08:30:25 -0700	[thread overview]
Message-ID: <20210916153025.1944763-36-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210916153025.1944763-1-richard.henderson@linaro.org>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/region.c | 91 ----------------------------------------------------
 1 file changed, 91 deletions(-)

diff --git a/tcg/region.c b/tcg/region.c
index e64c3ea230..9cc30d4922 100644
--- a/tcg/region.c
+++ b/tcg/region.c
@@ -467,38 +467,6 @@ static size_t tcg_n_regions(size_t tb_size, unsigned max_cpus)
   (DEFAULT_CODE_GEN_BUFFER_SIZE_1 < MAX_CODE_GEN_BUFFER_SIZE \
    ? DEFAULT_CODE_GEN_BUFFER_SIZE_1 : MAX_CODE_GEN_BUFFER_SIZE)
 
-#ifdef __mips__
-/*
- * In order to use J and JAL within the code_gen_buffer, we require
- * that the buffer not cross a 256MB boundary.
- */
-static inline bool cross_256mb(void *addr, size_t size)
-{
-    return ((uintptr_t)addr ^ ((uintptr_t)addr + size)) & ~0x0ffffffful;
-}
-
-/*
- * We weren't able to allocate a buffer without crossing that boundary,
- * so make do with the larger portion of the buffer that doesn't cross.
- * Returns the new base and size of the buffer in *obuf and *osize.
- */
-static inline void split_cross_256mb(void **obuf, size_t *osize,
-                                     void *buf1, size_t size1)
-{
-    void *buf2 = (void *)(((uintptr_t)buf1 + size1) & ~0x0ffffffful);
-    size_t size2 = buf1 + size1 - buf2;
-
-    size1 = buf2 - buf1;
-    if (size1 < size2) {
-        size1 = size2;
-        buf1 = buf2;
-    }
-
-    *obuf = buf1;
-    *osize = size1;
-}
-#endif
-
 #ifdef USE_STATIC_CODE_GEN_BUFFER
 static uint8_t static_code_gen_buffer[DEFAULT_CODE_GEN_BUFFER_SIZE]
     __attribute__((aligned(CODE_GEN_ALIGN)));
@@ -526,12 +494,6 @@ static int alloc_code_gen_buffer(size_t tb_size, int splitwx, Error **errp)
         size = QEMU_ALIGN_DOWN(tb_size, qemu_real_host_page_size);
     }
 
-#ifdef __mips__
-    if (cross_256mb(buf, size)) {
-        split_cross_256mb(&buf, &size, buf, size);
-    }
-#endif
-
     region.start_aligned = buf;
     region.total_size = size;
 
@@ -573,39 +535,6 @@ static int alloc_code_gen_buffer_anon(size_t size, int prot,
         return -1;
     }
 
-#ifdef __mips__
-    if (cross_256mb(buf, size)) {
-        /*
-         * Try again, with the original still mapped, to avoid re-acquiring
-         * the same 256mb crossing.
-         */
-        size_t size2;
-        void *buf2 = mmap(NULL, size, prot, flags, -1, 0);
-        switch ((int)(buf2 != MAP_FAILED)) {
-        case 1:
-            if (!cross_256mb(buf2, size)) {
-                /* Success!  Use the new buffer.  */
-                munmap(buf, size);
-                break;
-            }
-            /* Failure.  Work with what we had.  */
-            munmap(buf2, size);
-            /* fallthru */
-        default:
-            /* Split the original buffer.  Free the smaller half.  */
-            split_cross_256mb(&buf2, &size2, buf, size);
-            if (buf == buf2) {
-                munmap(buf + size2, size - size2);
-            } else {
-                munmap(buf, size - size2);
-            }
-            size = size2;
-            break;
-        }
-        buf = buf2;
-    }
-#endif
-
     region.start_aligned = buf;
     region.total_size = size;
     return prot;
@@ -620,35 +549,15 @@ static bool alloc_code_gen_buffer_splitwx_memfd(size_t size, Error **errp)
     void *buf_rw = NULL, *buf_rx = MAP_FAILED;
     int fd = -1;
 
-#ifdef __mips__
-    /* Find space for the RX mapping, vs the 256MiB regions. */
-    if (alloc_code_gen_buffer_anon(size, PROT_NONE,
-                                   MAP_PRIVATE | MAP_ANONYMOUS |
-                                   MAP_NORESERVE, errp) < 0) {
-        return false;
-    }
-    /* The size of the mapping may have been adjusted. */
-    buf_rx = region.start_aligned;
-    size = region.total_size;
-#endif
-
     buf_rw = qemu_memfd_alloc("tcg-jit", size, 0, &fd, errp);
     if (buf_rw == NULL) {
         goto fail;
     }
 
-#ifdef __mips__
-    void *tmp = mmap(buf_rx, size, PROT_READ | PROT_EXEC,
-                     MAP_SHARED | MAP_FIXED, fd, 0);
-    if (tmp != buf_rx) {
-        goto fail_rx;
-    }
-#else
     buf_rx = mmap(NULL, size, PROT_READ | PROT_EXEC, MAP_SHARED, fd, 0);
     if (buf_rx == MAP_FAILED) {
         goto fail_rx;
     }
-#endif
 
     close(fd);
     region.start_aligned = buf_rw;
-- 
2.25.1



  parent reply	other threads:[~2021-09-16 16:09 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-16 15:29 [PULL 00/35] tcg patch queue Richard Henderson
2021-09-16 15:29 ` [PULL 01/35] include/exec: Move cpu_signal_handler declaration Richard Henderson
2021-09-16 15:29 ` [PULL 02/35] accel/tcg: Restrict cpu_handle_halt() to sysemu Richard Henderson
2021-09-16 15:29 ` [PULL 03/35] hw/core: Restrict cpu_has_work() " Richard Henderson
2021-09-16 15:29 ` [PULL 04/35] hw/core: Un-inline cpu_has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 05/35] sysemu: Introduce AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 06/35] accel/kvm: Implement AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 07/35] accel/whpx: " Richard Henderson
2021-09-16 15:29 ` [PULL 08/35] accel/tcg: Implement AccelOpsClass::has_work() as stub Richard Henderson
2021-09-16 15:29 ` [PULL 09/35] target/alpha: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 10/35] target/arm: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 11/35] target/avr: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 12/35] target/cris: " Richard Henderson
2021-09-16 15:30 ` [PULL 13/35] target/hexagon: Remove unused has_work() handler Richard Henderson
2021-09-16 15:30 ` [PULL 14/35] target/hppa: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 15/35] target/i386: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 16/35] target/m68k: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 17/35] target/microblaze: " Richard Henderson
2021-09-16 15:30 ` [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 19/35] target/nios2: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 20/35] target/openrisc: " Richard Henderson
2021-09-16 15:30 ` [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work() Richard Henderson
2021-09-16 15:30 ` [PULL 22/35] target/ppc: Restrict has_work() handlers to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 23/35] target/riscv: Restrict has_work() handler " Richard Henderson
2021-09-16 15:30 ` [PULL 24/35] target/rx: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition Richard Henderson
2021-09-16 15:30 ` [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 29/35] target/tricore: " Richard Henderson
2021-09-16 15:30 ` [PULL 30/35] target/xtensa: " Richard Henderson
2021-09-16 15:30 ` [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Richard Henderson
2021-09-16 15:30 ` [PULL 32/35] tcg/mips: Drop inline markers Richard Henderson
2021-09-16 15:30 ` [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr Richard Henderson
2021-09-16 15:30 ` [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump Richard Henderson
2021-09-16 15:30 ` Richard Henderson [this message]
2021-09-20 10:07 ` [PULL 00/35] tcg patch queue Peter Maydell
2021-09-20 12:51   ` Philippe Mathieu-Daudé
2021-09-20 13:14   ` Philippe Mathieu-Daudé
2021-09-20 13:52     ` Philippe Mathieu-Daudé
2021-09-20 21:16       ` Philippe Mathieu-Daudé
2021-09-21  9:28         ` Peter Maydell
2021-09-21  9:41           ` Philippe Mathieu-Daudé
2021-09-21  9:47             ` Peter Maydell
2021-09-20 13:19   ` Richard Henderson
2021-09-21 15:25     ` Peter Maydell

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