From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 08/35] accel/tcg: Implement AccelOpsClass::has_work() as stub
Date: Thu, 16 Sep 2021 08:29:58 -0700 [thread overview]
Message-ID: <20210916153025.1944763-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210916153025.1944763-1-richard.henderson@linaro.org>
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Add TCG target-specific has_work() handler in TCGCPUOps,
and add tcg_cpu_has_work() as AccelOpsClass has_work()
implementation.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210912172731.789788-8-f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/core/tcg-cpu-ops.h | 4 ++++
accel/tcg/tcg-accel-ops.c | 12 ++++++++++++
2 files changed, 16 insertions(+)
diff --git a/include/hw/core/tcg-cpu-ops.h b/include/hw/core/tcg-cpu-ops.h
index 55123cb4d2..4a4c4053e3 100644
--- a/include/hw/core/tcg-cpu-ops.h
+++ b/include/hw/core/tcg-cpu-ops.h
@@ -66,6 +66,10 @@ struct TCGCPUOps {
void (*do_interrupt)(CPUState *cpu);
#endif /* !CONFIG_USER_ONLY || !TARGET_I386 */
#ifdef CONFIG_SOFTMMU
+ /**
+ * @has_work: Callback for checking if there is work to do.
+ */
+ bool (*has_work)(CPUState *cpu);
/** @cpu_exec_interrupt: Callback for processing interrupts in cpu_exec */
bool (*cpu_exec_interrupt)(CPUState *cpu, int interrupt_request);
/**
diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c
index 1a8e8390bd..ed4ebe735f 100644
--- a/accel/tcg/tcg-accel-ops.c
+++ b/accel/tcg/tcg-accel-ops.c
@@ -32,6 +32,7 @@
#include "qemu/main-loop.h"
#include "qemu/guest-random.h"
#include "exec/exec-all.h"
+#include "hw/core/tcg-cpu-ops.h"
#include "tcg-accel-ops.h"
#include "tcg-accel-ops-mttcg.h"
@@ -73,6 +74,16 @@ int tcg_cpus_exec(CPUState *cpu)
return ret;
}
+static bool tcg_cpu_has_work(CPUState *cpu)
+{
+ CPUClass *cc = CPU_GET_CLASS(cpu);
+
+ if (!cc->tcg_ops->has_work) {
+ return false;
+ }
+ return cc->tcg_ops->has_work(cpu);
+}
+
/* mask must never be zero, except for A20 change call */
void tcg_handle_interrupt(CPUState *cpu, int mask)
{
@@ -108,6 +119,7 @@ static void tcg_accel_ops_init(AccelOpsClass *ops)
ops->kick_vcpu_thread = rr_kick_vcpu_thread;
ops->handle_interrupt = tcg_handle_interrupt;
}
+ ops->has_work = tcg_cpu_has_work;
}
static void tcg_accel_ops_class_init(ObjectClass *oc, void *data)
--
2.25.1
next prev parent reply other threads:[~2021-09-16 15:33 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-16 15:29 [PULL 00/35] tcg patch queue Richard Henderson
2021-09-16 15:29 ` [PULL 01/35] include/exec: Move cpu_signal_handler declaration Richard Henderson
2021-09-16 15:29 ` [PULL 02/35] accel/tcg: Restrict cpu_handle_halt() to sysemu Richard Henderson
2021-09-16 15:29 ` [PULL 03/35] hw/core: Restrict cpu_has_work() " Richard Henderson
2021-09-16 15:29 ` [PULL 04/35] hw/core: Un-inline cpu_has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 05/35] sysemu: Introduce AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 06/35] accel/kvm: Implement AccelOpsClass::has_work() Richard Henderson
2021-09-16 15:29 ` [PULL 07/35] accel/whpx: " Richard Henderson
2021-09-16 15:29 ` Richard Henderson [this message]
2021-09-16 15:29 ` [PULL 09/35] target/alpha: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 10/35] target/arm: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 11/35] target/avr: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 12/35] target/cris: " Richard Henderson
2021-09-16 15:30 ` [PULL 13/35] target/hexagon: Remove unused has_work() handler Richard Henderson
2021-09-16 15:30 ` [PULL 14/35] target/hppa: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 15/35] target/i386: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 16/35] target/m68k: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 17/35] target/microblaze: " Richard Henderson
2021-09-16 15:30 ` [PULL 18/35] target/mips: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 19/35] target/nios2: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 20/35] target/openrisc: " Richard Henderson
2021-09-16 15:30 ` [PULL 21/35] target/ppc: Introduce PowerPCCPUClass::has_work() Richard Henderson
2021-09-16 15:30 ` [PULL 22/35] target/ppc: Restrict has_work() handlers to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 23/35] target/riscv: Restrict has_work() handler " Richard Henderson
2021-09-16 15:30 ` [PULL 24/35] target/rx: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 25/35] target/s390x: Restrict has_work() handler to sysemu and TCG Richard Henderson
2021-09-16 15:30 ` [PULL 26/35] target/sh4: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 27/35] target/sparc: Remove pointless use of CONFIG_TCG definition Richard Henderson
2021-09-16 15:30 ` [PULL 28/35] target/sparc: Restrict has_work() handler to sysemu Richard Henderson
2021-09-16 15:30 ` [PULL 29/35] target/tricore: " Richard Henderson
2021-09-16 15:30 ` [PULL 30/35] target/xtensa: " Richard Henderson
2021-09-16 15:30 ` [PULL 31/35] accel: Add missing AccelOpsClass::has_work() and drop SysemuCPUOps one Richard Henderson
2021-09-16 15:30 ` [PULL 32/35] tcg/mips: Drop inline markers Richard Henderson
2021-09-16 15:30 ` [PULL 33/35] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr Richard Henderson
2021-09-16 15:30 ` [PULL 34/35] tcg/mips: Unset TCG_TARGET_HAS_direct_jump Richard Henderson
2021-09-16 15:30 ` [PULL 35/35] tcg/mips: Drop special alignment for code_gen_buffer Richard Henderson
2021-09-20 10:07 ` [PULL 00/35] tcg patch queue Peter Maydell
2021-09-20 12:51 ` Philippe Mathieu-Daudé
2021-09-20 13:14 ` Philippe Mathieu-Daudé
2021-09-20 13:52 ` Philippe Mathieu-Daudé
2021-09-20 21:16 ` Philippe Mathieu-Daudé
2021-09-21 9:28 ` Peter Maydell
2021-09-21 9:41 ` Philippe Mathieu-Daudé
2021-09-21 9:47 ` Peter Maydell
2021-09-20 13:19 ` Richard Henderson
2021-09-21 15:25 ` Peter Maydell
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