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Thu, 16 Sep 2021 14:50:43 -0700 (PDT) Received: from toolbox.alistair23.me (unknown [10.225.165.23]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4H9W3h4CVmz1Rws6; Thu, 16 Sep 2021 14:50:40 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: alistair23@gmail.com, Bin Meng , Alistair Francis Subject: [PULL 18/21] docs/system/riscv: sifive_u: Update U-Boot instructions Date: Fri, 17 Sep 2021 07:49:01 +1000 Message-Id: <20210916214904.734206-19-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210916214904.734206-1-alistair.francis@opensource.wdc.com> References: <20210916214904.734206-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=68.232.143.124; envelope-from=prvs=886e160e1=alistair.francis@opensource.wdc.com; helo=esa2.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng In U-Boot v2021.07 release, there were 2 major changes for the SiFive Unleashed board support: - Board config name was changed from sifive_fu540_defconfig to sifive_unleashed_defconfig - The generic binman tool was used to generate the FIT image (combination of U-Boot proper, DTB and OpenSBI firmware) which make the existing U-Boot instructions out of date. Update the doc with latest instructions. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210911153431.10362-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis --- docs/system/riscv/sifive_u.rst | 49 ++++++++++++++++++---------------- 1 file changed, 26 insertions(+), 23 deletions(-) diff --git a/docs/system/riscv/sifive_u.rst b/docs/system/riscv/sifive_u.= rst index 7c65e9c440..7b166567f9 100644 --- a/docs/system/riscv/sifive_u.rst +++ b/docs/system/riscv/sifive_u.rst @@ -210,15 +210,16 @@ command line options with ``qemu-system-riscv32``. Running U-Boot -------------- =20 -U-Boot mainline v2021.01 release is tested at the time of writing. To bu= ild a +U-Boot mainline v2021.07 release is tested at the time of writing. To bu= ild a U-Boot mainline bootloader that can be booted by the ``sifive_u`` machin= e, use -the sifive_fu540_defconfig with similar commands as described above for = Linux: +the sifive_unleashed_defconfig with similar commands as described above = for +Linux: =20 .. code-block:: bash =20 $ export CROSS_COMPILE=3Driscv64-linux- $ export OPENSBI=3D/path/to/opensbi-riscv64-generic-fw_dynamic.bin - $ make sifive_fu540_defconfig + $ make sifive_unleashed_defconfig =20 You will get spl/u-boot-spl.bin and u-boot.itb file in the build tree. =20 @@ -313,31 +314,29 @@ board on QEMU ``sifive_u`` machine out of the box. = This allows users to develop and test the recommended RISC-V boot flow with a real world use case: ZSBL (in QEMU) loads U-Boot SPL from SD card or SPI flash to L2LIM= , then U-Boot SPL loads the combined payload image of OpenSBI fw_dynamic -firmware and U-Boot proper. However sometimes we want to have a quick te= st -of booting U-Boot on QEMU without the needs of preparing the SPI flash o= r -SD card images, an alternate way can be used, which is to create a U-Boo= t -S-mode image by modifying the configuration of U-Boot: +firmware and U-Boot proper. + +However sometimes we want to have a quick test of booting U-Boot on QEMU +without the needs of preparing the SPI flash or SD card images, an alter= nate +way can be used, which is to create a U-Boot S-mode image by modifying t= he +configuration of U-Boot: =20 .. code-block:: bash =20 + $ export CROSS_COMPILE=3Driscv64-linux- + $ make sifive_unleashed_defconfig $ make menuconfig =20 -then manually select the following configuration in U-Boot: - - Device Tree Control > Provider of DTB for DT Control > Prior Stage boo= tloader DTB +then manually select the following configuration: =20 -This lets U-Boot to use the QEMU generated device tree blob. During the = build, -a build error will be seen below: + * Device Tree Control ---> Provider of DTB for DT Control ---> Prior S= tage bootloader DTB =20 -.. code-block:: none +and unselect the following configuration: =20 - MKIMAGE u-boot.img - ./tools/mkimage: Can't open arch/riscv/dts/hifive-unleashed-a00.dtb: N= o such file or directory - ./tools/mkimage: failed to build FIT - make: *** [Makefile:1440: u-boot.img] Error 1 + * Library routines ---> Allow access to binman information in the devi= ce tree =20 -The above errors can be safely ignored as we don't run U-Boot SPL under = QEMU -in this alternate configuration. +This changes U-Boot to use the QEMU generated device tree blob, and bypa= ss +running the U-Boot SPL stage. =20 Boot the 64-bit U-Boot S-mode image directly: =20 @@ -352,14 +351,18 @@ It's possible to create a 32-bit U-Boot S-mode imag= e as well. .. code-block:: bash =20 $ export CROSS_COMPILE=3Driscv64-linux- - $ make sifive_fu540_defconfig + $ make sifive_unleashed_defconfig $ make menuconfig =20 then manually update the following configuration in U-Boot: =20 - Device Tree Control > Provider of DTB for DT Control > Prior Stage boo= tloader DTB - RISC-V architecture > Base ISA > RV32I - Boot images > Text Base > 0x80400000 + * Device Tree Control ---> Provider of DTB for DT Control ---> Prior S= tage bootloader DTB + * RISC-V architecture ---> Base ISA ---> RV32I + * Boot options ---> Boot images ---> Text Base ---> 0x80400000 + +and unselect the following configuration: + + * Library routines ---> Allow access to binman information in the devi= ce tree =20 Use the same command line options to boot the 32-bit U-Boot S-mode image= : =20 --=20 2.31.1