From: WANG Xuerui <git@xen0n.name>
To: qemu-devel@nongnu.org
Cc: WANG Xuerui <git@xen0n.name>
Subject: [PATCH 20/30] tcg/loongarch: Implement setcond ops
Date: Mon, 20 Sep 2021 16:04:41 +0800 [thread overview]
Message-ID: <20210920080451.408655-21-git@xen0n.name> (raw)
In-Reply-To: <20210920080451.408655-1-git@xen0n.name>
Signed-off-by: WANG Xuerui <git@xen0n.name>
---
tcg/loongarch/tcg-target.c.inc | 53 ++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/tcg/loongarch/tcg-target.c.inc b/tcg/loongarch/tcg-target.c.inc
index a533a5619d..fb0143474a 100644
--- a/tcg/loongarch/tcg-target.c.inc
+++ b/tcg/loongarch/tcg-target.c.inc
@@ -373,6 +373,52 @@ static void tcg_out_clzctz(TCGContext *s, LoongArchInsn opc,
tcg_out_opc_or(s, a0, TCG_REG_TMP0, a0);
}
+static void tcg_out_setcond(TCGContext *s, TCGCond cond, TCGReg ret,
+ TCGReg arg1, TCGReg arg2)
+{
+ switch (cond) {
+ case TCG_COND_EQ:
+ tcg_out_opc_sub_d(s, ret, arg1, arg2);
+ tcg_out_opc_sltui(s, ret, ret, 1);
+ break;
+ case TCG_COND_NE:
+ tcg_out_opc_sub_d(s, ret, arg1, arg2);
+ tcg_out_opc_sltu(s, ret, TCG_REG_ZERO, ret);
+ break;
+ case TCG_COND_LT:
+ tcg_out_opc_slt(s, ret, arg1, arg2);
+ break;
+ case TCG_COND_GE:
+ tcg_out_opc_slt(s, ret, arg1, arg2);
+ tcg_out_opc_xori(s, ret, ret, 1);
+ break;
+ case TCG_COND_LE:
+ tcg_out_opc_slt(s, ret, arg2, arg1);
+ tcg_out_opc_xori(s, ret, ret, 1);
+ break;
+ case TCG_COND_GT:
+ tcg_out_opc_slt(s, ret, arg2, arg1);
+ break;
+ case TCG_COND_LTU:
+ tcg_out_opc_sltu(s, ret, arg1, arg2);
+ break;
+ case TCG_COND_GEU:
+ tcg_out_opc_sltu(s, ret, arg1, arg2);
+ tcg_out_opc_xori(s, ret, ret, 1);
+ break;
+ case TCG_COND_LEU:
+ tcg_out_opc_sltu(s, ret, arg2, arg1);
+ tcg_out_opc_xori(s, ret, ret, 1);
+ break;
+ case TCG_COND_GTU:
+ tcg_out_opc_sltu(s, ret, arg2, arg1);
+ break;
+ default:
+ g_assert_not_reached();
+ break;
+ }
+}
+
/*
* Branch helpers
*/
@@ -726,6 +772,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_opc_mod_du(s, a0, a1, a2);
break;
+ case INDEX_op_setcond_i32:
+ case INDEX_op_setcond_i64:
+ tcg_out_setcond(s, args[3], a0, a1, a2);
+ break;
+
case INDEX_op_mov_i32: /* Always emitted via tcg_out_mov. */
case INDEX_op_mov_i64:
default:
@@ -830,6 +881,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
case INDEX_op_rem_i64:
case INDEX_op_remu_i32:
case INDEX_op_remu_i64:
+ case INDEX_op_setcond_i32:
+ case INDEX_op_setcond_i64:
return C_O1_I2(r, rZ, rZ);
default:
--
2.33.0
next prev parent reply other threads:[~2021-09-20 14:09 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-20 8:04 [PATCH 00/30] 64-bit LoongArch port of QEMU TCG WANG Xuerui
2021-09-20 8:04 ` [PATCH 01/30] elf: Add machine type value for LoongArch WANG Xuerui
2021-09-20 8:04 ` [PATCH 02/30] MAINTAINERS: Add tcg/loongarch entry with myself as maintainer WANG Xuerui
2021-09-20 14:50 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 03/30] tcg/loongarch: Add the tcg-target.h file WANG Xuerui
2021-09-20 14:23 ` Richard Henderson
2021-09-20 16:20 ` WANG Xuerui
2021-09-20 16:25 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 04/30] tcg/loongarch: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-09-20 15:55 ` Richard Henderson
2021-09-20 16:24 ` WANG Xuerui
2021-09-21 9:58 ` Philippe Mathieu-Daudé
2021-09-21 11:40 ` WANG Xuerui
2021-09-20 8:04 ` [PATCH 05/30] tcg/loongarch: Add register names, allocation order and input/output sets WANG Xuerui
2021-09-20 15:57 ` Richard Henderson
2021-09-20 16:27 ` WANG Xuerui
2021-09-20 8:04 ` [PATCH 06/30] tcg/loongarch: Define the operand constraints WANG Xuerui
2021-09-20 14:28 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 07/30] tcg/loongarch: Implement necessary relocation operations WANG Xuerui
2021-09-20 14:36 ` Richard Henderson
2021-09-20 17:15 ` WANG Xuerui
2021-09-20 8:04 ` [PATCH 08/30] tcg/loongarch: Implement the memory barrier op WANG Xuerui
2021-09-20 8:04 ` [PATCH 09/30] tcg/loongarch: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-09-20 14:47 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 10/30] tcg/loongarch: Implement goto_ptr WANG Xuerui
2021-09-20 14:49 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 11/30] tcg/loongarch: Implement sign-/zero-extension ops WANG Xuerui
2021-09-20 14:50 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 12/30] tcg/loongarch: Implement not/and/or/xor/nor/andc/orc ops WANG Xuerui
2021-09-20 14:54 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 13/30] tcg/loongarch: Implement deposit/extract ops WANG Xuerui
2021-09-20 14:55 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 14/30] tcg/loongarch: Implement bswap32_i32/bswap64_i64 WANG Xuerui
2021-09-20 15:11 ` Richard Henderson
2021-09-20 18:20 ` Richard Henderson
2021-09-21 6:37 ` WANG Xuerui
2021-09-20 8:04 ` [PATCH 15/30] tcg/loongarch: Implement clz/ctz ops WANG Xuerui
2021-09-20 16:10 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 16/30] tcg/loongarch: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-09-20 16:13 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 17/30] tcg/loongarch: Implement neg/add/sub ops WANG Xuerui
2021-09-20 16:16 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 18/30] tcg/loongarch: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-09-20 16:16 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 19/30] tcg/loongarch: Implement br/brcond ops WANG Xuerui
2021-09-20 16:20 ` Richard Henderson
2021-09-20 8:04 ` WANG Xuerui [this message]
2021-09-20 16:24 ` [PATCH 20/30] tcg/loongarch: Implement setcond ops Richard Henderson
2021-09-20 8:04 ` [PATCH 21/30] tcg/loongarch: Implement tcg_out_call WANG Xuerui
2021-09-20 16:31 ` Richard Henderson
2021-09-20 16:35 ` Richard Henderson
2021-09-21 6:42 ` WANG Xuerui
2021-09-20 8:04 ` [PATCH 22/30] tcg/loongarch: Implement simple load/store ops WANG Xuerui
2021-09-20 16:35 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 23/30] tcg/loongarch: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-09-20 17:10 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 24/30] tcg/loongarch: Implement tcg_target_qemu_prologue WANG Xuerui
2021-09-20 17:15 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 25/30] tcg/loongarch: Implement exit_tb/goto_tb WANG Xuerui
2021-09-20 17:16 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 26/30] tcg/loongarch: Implement tcg_target_init WANG Xuerui
2021-09-20 17:19 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 27/30] tcg/loongarch: Register the JIT WANG Xuerui
2021-09-20 17:21 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 28/30] configure, meson.build: Mark support for 64-bit LoongArch hosts WANG Xuerui
2021-09-20 17:23 ` Richard Henderson
2021-09-21 6:02 ` WANG Xuerui
2021-09-21 6:59 ` Philippe Mathieu-Daudé
2021-09-21 7:24 ` WANG Xuerui
2021-09-21 13:30 ` Richard Henderson
2021-09-21 14:07 ` WANG Xuerui
2021-09-21 14:10 ` WANG Xuerui
2021-09-21 14:42 ` Peter Maydell
2021-09-21 15:59 ` Richard Henderson
2021-09-21 16:09 ` WANG Xuerui
2021-09-21 17:26 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 29/30] linux-user: Add host dependency for 64-bit LoongArch WANG Xuerui
2021-09-20 17:26 ` Richard Henderson
2021-09-20 8:04 ` [PATCH 30/30] accel/tcg/user-exec: Implement CPU-specific signal handler for LoongArch hosts WANG Xuerui
2021-09-20 17:31 ` Richard Henderson
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