From: "Cédric Le Goater" <clg@kaod.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Andrew Jeffery" <andrew@aj.id.au>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
qemu-devel@nongnu.org, qemu-arm@nongnu.org,
"Cédric Le Goater" <clg@kaod.org>,
"Joel Stanley" <joel@jms.id.au>
Subject: [PATCH v2 08/12] aspeed/smc: QOMify AspeedSMCFlash
Date: Mon, 20 Sep 2021 18:23:05 +0200 [thread overview]
Message-ID: <20210920162309.1091711-9-clg@kaod.org> (raw)
In-Reply-To: <20210920162309.1091711-1-clg@kaod.org>
AspeedSMCFlash is a small structure representing the AHB memory window
through which the contents of a flash device can be accessed with MMIOs.
Introduce an AspeedSMCFlash SysBusDevice model and attach the associated
memory region to the newly instantiated objects.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
include/hw/ssi/aspeed_smc.h | 13 +++++--
hw/ssi/aspeed_smc.c | 76 +++++++++++++++++++++++++++++++++----
2 files changed, 77 insertions(+), 12 deletions(-)
diff --git a/include/hw/ssi/aspeed_smc.h b/include/hw/ssi/aspeed_smc.h
index 40b6926b3e02..ee943228b96f 100644
--- a/include/hw/ssi/aspeed_smc.h
+++ b/include/hw/ssi/aspeed_smc.h
@@ -30,18 +30,23 @@
#include "qom/object.h"
struct AspeedSMCState;
-typedef struct AspeedSMCFlash {
- struct AspeedSMCState *controller;
+#define TYPE_ASPEED_SMC_FLASH "aspeed.smc.flash"
+OBJECT_DECLARE_SIMPLE_TYPE(AspeedSMCFlash, ASPEED_SMC_FLASH)
+struct AspeedSMCFlash {
+ SysBusDevice parent_obj;
+
+ struct AspeedSMCState *controller;
uint8_t cs;
MemoryRegion mmio;
-} AspeedSMCFlash;
+};
#define TYPE_ASPEED_SMC "aspeed.smc"
OBJECT_DECLARE_TYPE(AspeedSMCState, AspeedSMCClass, ASPEED_SMC)
#define ASPEED_SMC_R_MAX (0x100 / 4)
+#define ASPEED_SMC_CS_MAX 5
struct AspeedSMCState {
SysBusDevice parent_obj;
@@ -72,7 +77,7 @@ struct AspeedSMCState {
MemoryRegion *dram_mr;
AddressSpace dram_as;
- AspeedSMCFlash *flashes;
+ AspeedSMCFlash flashes[ASPEED_SMC_CS_MAX];
uint8_t snoop_index;
uint8_t snoop_dummies;
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index 643cde832396..c534e9bf87ee 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -1101,6 +1101,18 @@ static const MemoryRegionOps aspeed_smc_ops = {
.endianness = DEVICE_LITTLE_ENDIAN,
};
+static void aspeed_smc_instance_init(Object *obj)
+{
+ AspeedSMCState *s = ASPEED_SMC(obj);
+ AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
+ int i;
+
+ for (i = 0; i < asc->max_peripherals; i++) {
+ object_initialize_child(obj, "flash[*]", &s->flashes[i],
+ TYPE_ASPEED_SMC_FLASH);
+ }
+}
+
/*
* Initialize the custom address spaces for DMAs
*/
@@ -1123,7 +1135,6 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
AspeedSMCState *s = ASPEED_SMC(dev);
AspeedSMCClass *asc = ASPEED_SMC_GET_CLASS(s);
int i;
- char name[32];
hwaddr offset = 0;
/* keep a copy under AspeedSMCState to speed up accesses */
@@ -1170,8 +1181,6 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
&s->mmio_flash, 0, asc->flash_window_size);
sysbus_init_mmio(sbd, &s->mmio_flash_alias);
- s->flashes = g_new0(AspeedSMCFlash, asc->max_peripherals);
-
/*
* Let's create a sub memory region for each possible peripheral. All
* have a configurable memory segment in the overall flash mapping
@@ -1182,12 +1191,17 @@ static void aspeed_smc_realize(DeviceState *dev, Error **errp)
for (i = 0; i < asc->max_peripherals; ++i) {
AspeedSMCFlash *fl = &s->flashes[i];
- snprintf(name, sizeof(name), TYPE_ASPEED_SMC ".flash.%d", i);
+ if (!object_property_set_link(OBJECT(fl), "controller", OBJECT(s),
+ errp)) {
+ return;
+ }
+ if (!object_property_set_uint(OBJECT(fl), "cs", i, errp)) {
+ return;
+ }
+ if (!sysbus_realize(SYS_BUS_DEVICE(fl), errp)) {
+ return;
+ }
- fl->cs = i;
- fl->controller = s;
- memory_region_init_io(&fl->mmio, OBJECT(s), &aspeed_smc_flash_ops,
- fl, name, asc->segments[i].size);
memory_region_add_subregion(&s->mmio_flash, offset, &fl->mmio);
offset += asc->segments[i].size;
}
@@ -1231,12 +1245,57 @@ static void aspeed_smc_class_init(ObjectClass *klass, void *data)
static const TypeInfo aspeed_smc_info = {
.name = TYPE_ASPEED_SMC,
.parent = TYPE_SYS_BUS_DEVICE,
+ .instance_init = aspeed_smc_instance_init,
.instance_size = sizeof(AspeedSMCState),
.class_size = sizeof(AspeedSMCClass),
.class_init = aspeed_smc_class_init,
.abstract = true,
};
+static void aspeed_smc_flash_realize(DeviceState *dev, Error **errp)
+{
+ AspeedSMCFlash *s = ASPEED_SMC_FLASH(dev);
+ AspeedSMCClass *asc;
+ g_autofree char *name = g_strdup_printf(TYPE_ASPEED_SMC_FLASH ".%d", s->cs);
+
+ if (!s->controller) {
+ error_setg(errp, TYPE_ASPEED_SMC_FLASH ": 'controller' link not set");
+ return;
+ }
+
+ asc = ASPEED_SMC_GET_CLASS(s->controller);
+
+ /*
+ * Use the default segment value to size the memory region. This
+ * can be changed by FW at runtime.
+ */
+ memory_region_init_io(&s->mmio, OBJECT(s), &aspeed_smc_flash_ops,
+ s, name, asc->segments[s->cs].size);
+ sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->mmio);
+}
+
+static Property aspeed_smc_flash_properties[] = {
+ DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
+ DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC,
+ AspeedSMCState *),
+ DEFINE_PROP_END_OF_LIST(),
+};
+
+static void aspeed_smc_flash_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->desc = "Aspeed SMC Flash device region";
+ dc->realize = aspeed_smc_flash_realize;
+ device_class_set_props(dc, aspeed_smc_flash_properties);
+}
+
+static const TypeInfo aspeed_smc_flash_info = {
+ .name = TYPE_ASPEED_SMC_FLASH,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AspeedSMCFlash),
+ .class_init = aspeed_smc_flash_class_init,
+};
/*
* The Segment Registers of the AST2400 and AST2500 have a 8MB
@@ -1625,6 +1684,7 @@ static const TypeInfo aspeed_2600_spi2_info = {
static void aspeed_smc_register_types(void)
{
+ type_register_static(&aspeed_smc_flash_info);
type_register_static(&aspeed_smc_info);
type_register_static(&aspeed_2400_smc_info);
type_register_static(&aspeed_2400_fmc_info);
--
2.31.1
next prev parent reply other threads:[~2021-09-20 16:37 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-20 16:22 [PATCH v2 00/12] aspeed: SMC cleanups and QOMification Cédric Le Goater
2021-09-20 16:22 ` [PATCH v2 01/12] aspeed/smc: Add watchdog Control/Status Registers Cédric Le Goater
2021-09-20 16:22 ` [PATCH v2 02/12] aspeed/smc: Introduce aspeed_smc_error() helper Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 03/12] aspeed/smc: Stop using the model name for the memory regions Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 04/12] aspeed/smc: Drop AspeedSMCController structure Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 05/12] aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 06/12] aspeed/smc: Remove the 'size' " Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 07/12] aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs' Cédric Le Goater
2021-09-20 16:23 ` Cédric Le Goater [this message]
2021-09-20 16:23 ` [PATCH v2 09/12] aspeed/smc: Add default reset values Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 10/12] aspeed/smc: Introduce a new addr_width() class handler Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 11/12] aspeed/smc: Remove unused attribute 'irqline' Cédric Le Goater
2021-09-20 16:23 ` [PATCH v2 12/12] aspeed/i2c: QOMify AspeedI2CBus Cédric Le Goater
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