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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 08/10] tcg/sparc: Introduce tcg_out_mov_delay
Date: Mon, 20 Sep 2021 19:25:32 -0700	[thread overview]
Message-ID: <20210921022534.365291-9-richard.henderson@linaro.org> (raw)
In-Reply-To: <20210921022534.365291-1-richard.henderson@linaro.org>

This version of tcg_out_mov is emits a nop to fill the
delay slot if the move is not required.

The only current use, for INDEX_op_goto_ptr, will always
require the move but properly documents the delay slot.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/sparc/tcg-target.c.inc | 21 +++++++++++++++------
 1 file changed, 15 insertions(+), 6 deletions(-)

diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
index 1763253edd..9720d76abd 100644
--- a/tcg/sparc/tcg-target.c.inc
+++ b/tcg/sparc/tcg-target.c.inc
@@ -362,6 +362,11 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
     }
 }
 
+static void tcg_out_nop(TCGContext *s)
+{
+    tcg_out32(s, NOP);
+}
+
 static void tcg_out_arith(TCGContext *s, TCGReg rd, TCGReg rs1,
                           TCGReg rs2, int op)
 {
@@ -389,6 +394,15 @@ static bool tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
     return true;
 }
 
+static void tcg_out_mov_delay(TCGContext *s, TCGReg ret, TCGReg arg)
+{
+    if (ret != arg) {
+        tcg_out_arith(s, ret, arg, TCG_REG_G0, ARITH_OR);
+    } else {
+        tcg_out_nop(s);
+    }
+}
+
 static void tcg_out_sethi(TCGContext *s, TCGReg ret, uint32_t arg)
 {
     tcg_out32(s, SETHI | INSN_RD(ret) | ((arg & 0xfffffc00) >> 10));
@@ -551,11 +565,6 @@ static void tcg_out_div32(TCGContext *s, TCGReg rd, TCGReg rs1,
                    uns ? ARITH_UDIV : ARITH_SDIV);
 }
 
-static void tcg_out_nop(TCGContext *s)
-{
-    tcg_out32(s, NOP);
-}
-
 static const uint8_t tcg_cond_to_bcond[] = {
     [TCG_COND_EQ] = COND_E,
     [TCG_COND_NE] = COND_NE,
@@ -1349,7 +1358,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
     case INDEX_op_goto_ptr:
         tcg_out_arithi(s, TCG_REG_G0, a0, 0, JMPL);
         if (USE_REG_TB) {
-            tcg_out_arith(s, TCG_REG_TB, a0, TCG_REG_G0, ARITH_OR);
+            tcg_out_mov_delay(s, TCG_REG_TB, a0);
         } else {
             tcg_out_nop(s);
         }
-- 
2.25.1



  parent reply	other threads:[~2021-09-21  2:29 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-21  2:25 [PULL 00/10] tcg patch queue, v2 Richard Henderson
2021-09-21  2:25 ` [PULL 01/10] include/exec: Move cpu_signal_handler declaration Richard Henderson
2021-09-21  2:25 ` [PULL 02/10] accel/tcg: Restrict cpu_handle_halt() to sysemu Richard Henderson
2021-09-21  2:25 ` [PULL 03/10] tcg/mips: Drop inline markers Richard Henderson
2021-09-21  2:25 ` [PULL 04/10] tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr Richard Henderson
2021-09-21  2:25 ` [PULL 05/10] tcg/mips: Unset TCG_TARGET_HAS_direct_jump Richard Henderson
2021-09-21  2:25 ` [PULL 06/10] tcg/mips: Drop special alignment for code_gen_buffer Richard Henderson
2021-09-21  2:25 ` [PULL 07/10] tcg/sparc: Drop inline markers Richard Henderson
2021-09-21  2:25 ` Richard Henderson [this message]
2021-09-21  2:25 ` [PULL 09/10] hw/core: Make do_unaligned_access noreturn Richard Henderson
2021-09-21  2:25 ` [PULL 10/10] tcg/riscv: Remove add with zero on user-only memory access Richard Henderson

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