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Tue, 21 Sep 2021 19:50:31 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id x13sm433112pfp.133.2021.09.21.19.50.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Sep 2021 19:50:31 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 00/10] tcg patch queue, v3 Date: Tue, 21 Sep 2021 19:50:30 -0700 Message-Id: <20210922025030.574829-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Rebase and resolve minor conflict. r~ The following changes since commit 2c3e83f92d93fbab071b8a96b8ab769b01902475: Merge remote-tracking branch 'remotes/alistair23/tags/pull-riscv-to-apply-20210921' into staging (2021-09-21 10:57:48 -0700) are available in the Git repository at: https://gitlab.com/rth7680/qemu.git tags/pull-tcg-20210921 for you to fetch changes up to 81c65ee223ba759c15c11068f9b292a59a900451: tcg/riscv: Remove add with zero on user-only memory access (2021-09-21 19:36:44 -0700) ---------------------------------------------------------------- Move cpu_signal_handler declaration. Restrict cpu_handle_halt to sysemu. Make do_unaligned_access noreturn. Misc tcg/mips cleanup Misc tcg/sparc cleanup Misc tcg/riscv cleanup ---------------------------------------------------------------- Philippe Mathieu-Daudé (1): accel/tcg: Restrict cpu_handle_halt() to sysemu Richard Henderson (9): include/exec: Move cpu_signal_handler declaration tcg/mips: Drop inline markers tcg/mips: Allow JAL to be out of range in tcg_out_bswap_subr tcg/mips: Unset TCG_TARGET_HAS_direct_jump tcg/mips: Drop special alignment for code_gen_buffer tcg/sparc: Drop inline markers tcg/sparc: Introduce tcg_out_mov_delay hw/core: Make do_unaligned_access noreturn tcg/riscv: Remove add with zero on user-only memory access include/exec/exec-all.h | 13 +++++ include/hw/core/tcg-cpu-ops.h | 3 +- target/alpha/cpu.h | 10 +--- target/arm/cpu.h | 7 --- target/arm/internals.h | 2 +- target/avr/cpu.h | 2 - target/cris/cpu.h | 8 ---- target/hexagon/cpu.h | 3 -- target/hppa/cpu.h | 3 -- target/i386/cpu.h | 7 --- target/m68k/cpu.h | 8 ---- target/microblaze/cpu.h | 9 +--- target/mips/cpu.h | 3 -- target/mips/internal.h | 2 - target/mips/tcg/tcg-internal.h | 4 +- target/nios2/cpu.h | 6 +-- target/openrisc/cpu.h | 2 - target/ppc/cpu.h | 7 --- target/ppc/internal.h | 4 +- target/riscv/cpu.h | 4 +- target/rx/cpu.h | 4 -- target/s390x/cpu.h | 7 --- target/s390x/s390x-internal.h | 4 +- target/sh4/cpu.h | 7 +-- target/sparc/cpu.h | 2 - target/tricore/cpu.h | 2 - target/xtensa/cpu.h | 6 +-- tcg/mips/tcg-target.h | 12 ++--- accel/tcg/cpu-exec.c | 6 ++- target/hppa/cpu.c | 7 +-- tcg/region.c | 91 ----------------------------------- tcg/mips/tcg-target.c.inc | 105 ++++++++++++++--------------------------- tcg/riscv/tcg-target.c.inc | 10 +--- tcg/sparc/tcg-target.c.inc | 64 ++++++++++++++----------- 34 files changed, 119 insertions(+), 315 deletions(-)