From: Paolo Bonzini <pbonzini@redhat.com>
To: qemu-devel@nongnu.org
Cc: yang.zhong@intel.com, philmd@redhat.com, eblake@redhat.com,
Sean Christopherson <sean.j.christopherson@intel.com>
Subject: [PATCH v5 19/26] i386/pc: Add e820 entry for SGX EPC section(s)
Date: Fri, 24 Sep 2021 13:25:02 +0200 [thread overview]
Message-ID: <20210924112509.25061-20-pbonzini@redhat.com> (raw)
In-Reply-To: <20210924112509.25061-1-pbonzini@redhat.com>
From: Sean Christopherson <sean.j.christopherson@intel.com>
Note that SGX EPC is currently guaranteed to reside in a single
contiguous chunk of memory regardless of the number of EPC sections.
Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-19-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
---
hw/i386/pc.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index 58700af138..1260fb6197 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -883,6 +883,10 @@ void pc_memory_init(PCMachineState *pcms,
e820_add_entry(0x100000000ULL, x86ms->above_4g_mem_size, E820_RAM);
}
+ if (pcms->sgx_epc.size != 0) {
+ e820_add_entry(pcms->sgx_epc.base, pcms->sgx_epc.size, E820_RESERVED);
+ }
+
if (!pcmc->has_reserved_memory &&
(machine->ram_slots ||
(machine->maxram_size > machine->ram_size))) {
--
2.31.1
next prev parent reply other threads:[~2021-09-24 11:51 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-24 11:24 [PATCH v5 00/26] Qemu SGX virtualization Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 01/26] memory: Add RAM_PROTECTED flag to skip IOMMU mappings Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 02/26] Kconfig: Add CONFIG_SGX support Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 03/26] hostmem: Add hostmem-epc as a backend for SGX EPC Paolo Bonzini
2021-09-27 5:38 ` Philippe Mathieu-Daudé
2021-09-24 11:24 ` [PATCH v5 04/26] qom: Add memory-backend-epc ObjectOptions support Paolo Bonzini
2021-09-24 13:56 ` Eric Blake
2021-09-27 5:20 ` Yang Zhong
2021-09-24 11:24 ` [PATCH v5 05/26] i386: Add 'sgx-epc' device to expose EPC sections to guest Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 06/26] vl: Add sgx compound properties to expose SGX " Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 07/26] i386: Add primary SGX CPUID and MSR defines Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 08/26] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EAX Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 09/26] i386: Add SGX CPUID leaf FEAT_SGX_12_0_EBX Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 10/26] i386: Add SGX CPUID leaf FEAT_SGX_12_1_EAX Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 11/26] i386: Add get/set/migrate support for SGX_LEPUBKEYHASH MSRs Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 12/26] i386: Add feature control MSR dependency when SGX is enabled Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 13/26] i386: Update SGX CPUID info according to hardware/KVM/user input Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 14/26] i386: kvm: Add support for exposing PROVISIONKEY to guest Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 15/26] i386: Propagate SGX CPUID sub-leafs to KVM Paolo Bonzini
2021-09-24 11:24 ` [PATCH v5 16/26] Adjust min CPUID level to 0x12 when SGX is enabled Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 17/26] hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 18/26] hw/i386/pc: Account for SGX EPC sections when calculating device memory Paolo Bonzini
2021-09-24 11:25 ` Paolo Bonzini [this message]
2021-09-24 11:25 ` [PATCH v5 20/26] i386: acpi: Add SGX EPC entry to ACPI tables Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 21/26] q35: Add support for SGX EPC Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 22/26] i440fx: " Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 23/26] sgx-epc: Add the fill_device_info() callback support Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 24/26] docs/system: Add SGX documentation to the system manual Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 25/26] target/i386: Add HMP and QMP interfaces for SGX Paolo Bonzini
2021-09-24 11:25 ` [PATCH v5 26/26] target/i386: Add the query-sgx-capabilities QMP command Paolo Bonzini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210924112509.25061-20-pbonzini@redhat.com \
--to=pbonzini@redhat.com \
--cc=eblake@redhat.com \
--cc=philmd@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=sean.j.christopherson@intel.com \
--cc=yang.zhong@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).