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From: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
To: qemu-devel@nongnu.org
Cc: "Taylor Simpson" <tsimpson@quicinc.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v7 21/40] target/hexagon: Remove unused has_work() handler
Date: Sat, 25 Sep 2021 16:50:59 +0200	[thread overview]
Message-ID: <20210925145118.1361230-22-f4bug@amsat.org> (raw)
In-Reply-To: <20210925145118.1361230-1-f4bug@amsat.org>

has_work() is sysemu specific, and Hexagon target only provides
a linux-user implementation. Remove the unused hexagon_cpu_has_work().

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Taylor Simpson <tsimpson@quicinc.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/hexagon/cpu.c | 6 ------
 1 file changed, 6 deletions(-)

diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 3338365c16e..aa01974807c 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -189,11 +189,6 @@ static void hexagon_cpu_synchronize_from_tb(CPUState *cs,
     env->gpr[HEX_REG_PC] = tb->pc;
 }
 
-static bool hexagon_cpu_has_work(CPUState *cs)
-{
-    return true;
-}
-
 void restore_state_to_opc(CPUHexagonState *env, TranslationBlock *tb,
                           target_ulong *data)
 {
@@ -287,7 +282,6 @@ static void hexagon_cpu_class_init(ObjectClass *c, void *data)
     device_class_set_parent_reset(dc, hexagon_cpu_reset, &mcc->parent_reset);
 
     cc->class_by_name = hexagon_cpu_class_by_name;
-    cc->has_work = hexagon_cpu_has_work;
     cc->dump_state = hexagon_dump_state;
     cc->set_pc = hexagon_cpu_set_pc;
     cc->gdb_read_register = hexagon_gdb_read_register;
-- 
2.31.1



  parent reply	other threads:[~2021-09-25 15:03 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-25 14:50 [PATCH v7 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 01/40] accel: Simplify qemu_init_vcpu() Philippe Mathieu-Daudé
2021-09-25 15:25   ` Richard Henderson
2021-09-25 14:50 ` [PATCH v7 02/40] hw/core: Restrict cpu_has_work() to sysemu Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 03/40] hw/core: Un-inline cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 04/40] hw/core: Move cpu_common_has_work() to cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 05/40] accel: Introduce AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 06/40] accel/kvm: Implement AccelOpsClass::has_work() Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 07/40] accel/whpx: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 08/40] accel/hvf: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 09/40] accel/xen: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 10/40] accel/hax: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 11/40] accel/nvmm: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 12/40] accel/qtest: " Philippe Mathieu-Daudé
2021-09-25 15:27   ` Philippe Mathieu-Daudé
2021-09-25 15:32     ` Richard Henderson
2021-09-25 16:01       ` Philippe Mathieu-Daudé
2021-09-27  6:12         ` Laurent Vivier
2021-09-25 14:50 ` [PATCH v7 13/40] accel/tcg: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 14/40] accel: Simplify cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 15/40] accel/tcg: Introduce TCGCPUOps::has_work() Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 16/40] target/arm: Explicit v7M cores use arm_cpu_has_work as CPUClass:has_work Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 17/40] target/arm: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 18/40] target/alpha: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 19/40] target/avr: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` [PATCH v7 20/40] target/cris: " Philippe Mathieu-Daudé
2021-09-25 14:50 ` Philippe Mathieu-Daudé [this message]
2021-09-25 14:51 ` [PATCH v7 22/40] target/hppa: " Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 23/40] target/i386: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 24/40] target/m68k: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 25/40] target/microblaze: " Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 26/40] target/mips: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 27/40] target/nios2: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 28/40] target/openrisc: " Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 29/40] target/ppc: Introduce PowerPCCPUClass::has_work() Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 30/40] target/ppc: Restrict has_work() handlers to sysemu and TCG Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 31/40] target/riscv: Restrict has_work() handler " Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 32/40] target/rx: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 33/40] target/s390x: Restrict has_work() handler to sysemu and TCG Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 34/40] target/sh4: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 35/40] target/sparc: Remove pointless use of CONFIG_TCG definition Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 36/40] target/sparc: Restrict has_work() handler to sysemu Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 37/40] target/tricore: " Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 38/40] target/xtensa: " Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 39/40] accel/tcg: Remove CPUClass::has_work() Philippe Mathieu-Daudé
2021-09-25 14:51 ` [PATCH v7 40/40] accel/tcg: Simplify tcg_cpu_has_work() Philippe Mathieu-Daudé
2021-09-25 15:28 ` [PATCH v7 00/40] accel: Move has_work() from CPUClass to AccelOpsClass Richard Henderson
2021-09-25 15:36   ` Philippe Mathieu-Daudé

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