From: WANG Xuerui <git@xen0n.name>
To: qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
"XiaoJuan Yang" <yangxiaojuan@loongson.cn>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Song Gao" <gaosong@loongson.cn>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"WANG Xuerui" <git@xen0n.name>,
"Laurent Vivier" <laurent@vivier.eu>
Subject: [PATCH v6 07/30] tcg/loongarch64: Implement necessary relocation operations
Date: Sun, 26 Sep 2021 01:30:09 +0800 [thread overview]
Message-ID: <20210925173032.2434906-8-git@xen0n.name> (raw)
In-Reply-To: <20210925173032.2434906-1-git@xen0n.name>
Signed-off-by: WANG Xuerui <git@xen0n.name>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
---
tcg/loongarch64/tcg-target.c.inc | 66 ++++++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index 64e57bd055..fbacaef862 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -168,3 +168,69 @@ static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
}
return false;
}
+
+/*
+ * Relocations
+ */
+
+/*
+ * Relocation records defined in LoongArch ELF psABI v1.00 is way too
+ * complicated; a whopping stack machine is needed to stuff the fields, at
+ * the very least one SOP_PUSH and one SOP_POP (of the correct format) are
+ * needed.
+ *
+ * Hence, define our own simpler relocation types. Numbers are chosen as to
+ * not collide with potential future additions to the true ELF relocation
+ * type enum.
+ */
+
+/* Field Sk16, shifted right by 2; suitable for conditional jumps */
+#define R_LOONGARCH_BR_SK16 256
+/* Field Sd10k16, shifted right by 2; suitable for B and BL */
+#define R_LOONGARCH_BR_SD10K16 257
+
+static bool reloc_br_sk16(tcg_insn_unit *src_rw, const tcg_insn_unit *target)
+{
+ const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
+ intptr_t offset = (intptr_t)target - (intptr_t)src_rx;
+
+ tcg_debug_assert((offset & 3) == 0);
+ offset >>= 2;
+ if (offset == sextreg(offset, 0, 16)) {
+ *src_rw = deposit64(*src_rw, 10, 16, offset);
+ return true;
+ }
+
+ return false;
+}
+
+static bool reloc_br_sd10k16(tcg_insn_unit *src_rw,
+ const tcg_insn_unit *target)
+{
+ const tcg_insn_unit *src_rx = tcg_splitwx_to_rx(src_rw);
+ intptr_t offset = (intptr_t)target - (intptr_t)src_rx;
+
+ tcg_debug_assert((offset & 3) == 0);
+ offset >>= 2;
+ if (offset == sextreg(offset, 0, 26)) {
+ *src_rw = deposit64(*src_rw, 0, 10, offset >> 16); /* slot d10 */
+ *src_rw = deposit64(*src_rw, 10, 16, offset); /* slot k16 */
+ return true;
+ }
+
+ return false;
+}
+
+static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
+ intptr_t value, intptr_t addend)
+{
+ tcg_debug_assert(addend == 0);
+ switch (type) {
+ case R_LOONGARCH_BR_SK16:
+ return reloc_br_sk16(code_ptr, (tcg_insn_unit *)value);
+ case R_LOONGARCH_BR_SD10K16:
+ return reloc_br_sd10k16(code_ptr, (tcg_insn_unit *)value);
+ default:
+ g_assert_not_reached();
+ }
+}
--
2.33.0
next prev parent reply other threads:[~2021-09-25 17:46 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-25 17:30 [PATCH v6 00/30] LoongArch64 port of QEMU TCG WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 01/30] elf: Add machine type value for LoongArch WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 02/30] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 03/30] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 04/30] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 05/30] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 06/30] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-09-25 17:30 ` WANG Xuerui [this message]
2021-09-25 17:30 ` [PATCH v6 08/30] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 09/30] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-09-26 6:48 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 10/30] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-09-29 17:13 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 11/30] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 12/30] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 13/30] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-09-29 17:14 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 14/30] tcg/loongarch64: Implement bswap{16,32,64} ops WANG Xuerui
2021-09-26 6:50 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 15/30] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 16/30] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 17/30] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 18/30] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 19/30] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 20/30] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 21/30] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 22/30] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 23/30] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 24/30] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 25/30] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 26/30] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-09-26 7:15 ` Philippe Mathieu-Daudé
2021-09-26 23:07 ` Richard Henderson
2021-09-29 17:00 ` WANG Xuerui
2021-09-29 17:11 ` Philippe Mathieu-Daudé
2021-09-25 17:30 ` [PATCH v6 27/30] tcg/loongarch64: Register the JIT WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 28/30] linux-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 29/30] accel/tcg/user-exec: Implement CPU-specific signal handler " WANG Xuerui
2021-09-25 17:30 ` [PATCH v6 30/30] configure, meson.build: Mark support " WANG Xuerui
2021-09-26 7:17 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210925173032.2434906-8-git@xen0n.name \
--to=git@xen0n.name \
--cc=f4bug@amsat.org \
--cc=gaosong@loongson.cn \
--cc=laurent@vivier.eu \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=richard.henderson@linaro.org \
--cc=yangxiaojuan@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).