* [PATCH] hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19
@ 2021-09-26 2:56 Xuzhou Cheng
2021-09-26 7:40 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 3+ messages in thread
From: Xuzhou Cheng @ 2021-09-26 2:56 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, xuzhou.cheng, Jean-Christophe Dubois, qemu-arm,
bmeng.cn, groeck7
From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
The Linux spi-imx driver does not work on QEMU. The reason is that the
state of m25p80 loops in STATE_READING_DATA state after receiving
RDSR command, the new command is ignored. Before sending a new command,
CS line should be pulled high to make the state of m25p80 back to IDLE.
Currently the SPI flash CS line is connected to the SPI controller, but
on the real board, it's connected to GPIO3_19.
Should connect the SSI_GPIO_CS to GPIO3_19 when adding a spi-nor to
spi1 on sabrelite machine.
Verified this patch on Linux v5.14.
Logs:
# echo "01234567899876543210" > test
# mtd_debug erase /dev/mtd0 0x0 0x1000
Erased 4096 bytes from address 0x00000000 in flash
# mtd_debug write /dev/mtdblock0 0x0 20 test
Copied 20 bytes from test to address 0x00000000 in flash
# mtd_debug read /dev/mtdblock0 0x0 20 test_out
Copied 20 bytes from address 0x00000000 in flash to test_out
# cat test_out
01234567899876543210#
Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
Reported-by: Guenter Roeck <linux@roeck-us.net>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
---
hw/arm/sabrelite.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
index 29fc777b61..553608e583 100644
--- a/hw/arm/sabrelite.c
+++ b/hw/arm/sabrelite.c
@@ -87,7 +87,7 @@ static void sabrelite_init(MachineState *machine)
qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal);
cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
- sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line);
+ qdev_connect_gpio_out(DEVICE(&s->gpio[2]), 19, cs_line);
}
}
}
--
2.17.1
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [PATCH] hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19
2021-09-26 2:56 [PATCH] hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19 Xuzhou Cheng
@ 2021-09-26 7:40 ` Philippe Mathieu-Daudé
2021-09-27 2:25 ` Cheng, Xuzhou
0 siblings, 1 reply; 3+ messages in thread
From: Philippe Mathieu-Daudé @ 2021-09-26 7:40 UTC (permalink / raw)
To: Xuzhou Cheng, qemu-devel
Cc: Peter Maydell, xuzhou.cheng, Jean-Christophe Dubois, qemu-arm,
bmeng.cn, groeck7
On 9/26/21 04:56, Xuzhou Cheng wrote:
> From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
>
> The Linux spi-imx driver does not work on QEMU. The reason is that the
> state of m25p80 loops in STATE_READING_DATA state after receiving
> RDSR command, the new command is ignored. Before sending a new command,
> CS line should be pulled high to make the state of m25p80 back to IDLE.
>
> Currently the SPI flash CS line is connected to the SPI controller, but
> on the real board, it's connected to GPIO3_19.
Maybe worth mentioning this matches the board dts:
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi:
310 &ecspi1 {
311 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
312 pinctrl-names = "default";
313 pinctrl-0 = <&pinctrl_ecspi1>;
314 status = "okay";
315
316 flash: m25p80@0 {
317 compatible = "sst,sst25vf016b", "jedec,spi-nor";
318 spi-max-frequency = <20000000>;
319 reg = <0>;
320 };
321 };
> Should connect the SSI_GPIO_CS to GPIO3_19 when adding a spi-nor to
> spi1 on sabrelite machine.
>
> Verified this patch on Linux v5.14.
>
> Logs:
> # echo "01234567899876543210" > test
> # mtd_debug erase /dev/mtd0 0x0 0x1000
> Erased 4096 bytes from address 0x00000000 in flash
> # mtd_debug write /dev/mtdblock0 0x0 20 test
> Copied 20 bytes from test to address 0x00000000 in flash
> # mtd_debug read /dev/mtdblock0 0x0 20 test_out
> Copied 20 bytes from address 0x00000000 in flash to test_out
> # cat test_out
> 01234567899876543210#
>
> Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> Reported-by: Guenter Roeck <linux@roeck-us.net>
> Reviewed-by: Bin Meng <bin.meng@windriver.com>
> ---
> hw/arm/sabrelite.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c
> index 29fc777b61..553608e583 100644
> --- a/hw/arm/sabrelite.c
> +++ b/hw/arm/sabrelite.c
> @@ -87,7 +87,7 @@ static void sabrelite_init(MachineState *machine)
> qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal);
>
> cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
> - sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line);
> + qdev_connect_gpio_out(DEVICE(&s->gpio[2]), 19, cs_line);
> }
> }
> }
>
Thank for using an oscilloscope to verify, it reminded me
some SDcard debugging 4 years ago =)
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
^ permalink raw reply [flat|nested] 3+ messages in thread* RE: [PATCH] hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19
2021-09-26 7:40 ` Philippe Mathieu-Daudé
@ 2021-09-27 2:25 ` Cheng, Xuzhou
0 siblings, 0 replies; 3+ messages in thread
From: Cheng, Xuzhou @ 2021-09-27 2:25 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, Xuzhou Cheng, qemu-devel@nongnu.org
Cc: Peter Maydell, qemu-arm@nongnu.org, bmeng.cn@gmail.com,
groeck7@gmail.com, Jean-Christophe Dubois
> On 9/26/21 04:56, Xuzhou Cheng wrote:
> > From: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> >
> > The Linux spi-imx driver does not work on QEMU. The reason is that the
> > state of m25p80 loops in STATE_READING_DATA state after receiving RDSR
> > command, the new command is ignored. Before sending a new command, CS
> > line should be pulled high to make the state of m25p80 back to IDLE.
> >
> > Currently the SPI flash CS line is connected to the SPI controller,
> > but on the real board, it's connected to GPIO3_19.
>
> Maybe worth mentioning this matches the board dts:
>
> arch/arm/boot/dts/imx6qdl-sabrelite.dtsi:
>
> 310 &ecspi1 {
> 311 cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
> 312 pinctrl-names = "default";
> 313 pinctrl-0 = <&pinctrl_ecspi1>;
> 314 status = "okay";
> 315
> 316 flash: m25p80@0 {
> 317 compatible = "sst,sst25vf016b", "jedec,spi-nor";
> 318 spi-max-frequency = <20000000>;
> 319 reg = <0>;
> 320 };
> 321 };
Yes, it's worthy. I'll send v2 to update commit message.
> > Should connect the SSI_GPIO_CS to GPIO3_19 when adding a spi-nor to
> > spi1 on sabrelite machine.
> >
> > Verified this patch on Linux v5.14.
> >
> > Logs:
> > # echo "01234567899876543210" > test
> > # mtd_debug erase /dev/mtd0 0x0 0x1000
> > Erased 4096 bytes from address 0x00000000 in flash
> > # mtd_debug write /dev/mtdblock0 0x0 20 test
> > Copied 20 bytes from test to address 0x00000000 in flash
> > # mtd_debug read /dev/mtdblock0 0x0 20 test_out
> > Copied 20 bytes from address 0x00000000 in flash to test_out
> > # cat test_out
> > 01234567899876543210#
> >
> > Signed-off-by: Xuzhou Cheng <xuzhou.cheng@windriver.com>
> > Reported-by: Guenter Roeck <linux@roeck-us.net>
> > Reviewed-by: Bin Meng <bin.meng@windriver.com>
> > ---
> > hw/arm/sabrelite.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/hw/arm/sabrelite.c b/hw/arm/sabrelite.c index
> > 29fc777b61..553608e583 100644
> > --- a/hw/arm/sabrelite.c
> > +++ b/hw/arm/sabrelite.c
> > @@ -87,7 +87,7 @@ static void sabrelite_init(MachineState *machine)
> > qdev_realize_and_unref(flash_dev, BUS(spi_bus),
> > &error_fatal);
> >
> > cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
> > - sysbus_connect_irq(SYS_BUS_DEVICE(spi_dev), 1, cs_line);
> > + qdev_connect_gpio_out(DEVICE(&s->gpio[2]), 19,
> > + cs_line);
> > }
> > }
> > }
> >
>
> Thank for using an oscilloscope to verify, it reminded me some SDcard debugging 4 years ago =)
It's fun to play oscilloscope. :^)
^ permalink raw reply [flat|nested] 3+ messages in thread
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2021-09-26 2:56 [PATCH] hw/arm: sabrelite: Connect SPI flash CS line to GPIO3_19 Xuzhou Cheng
2021-09-26 7:40 ` Philippe Mathieu-Daudé
2021-09-27 2:25 ` Cheng, Xuzhou
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