From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <Alistair.Francis@wdc.com>,
qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Cc: "Frank Chang" <frank.chang@sifive.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"Markus Armbruster" <armbru@redhat.com>
Subject: [PATCH v2 1/2] hw/dma: sifive_pdma: Fix Control.claim bit detection
Date: Mon, 27 Sep 2021 15:21:23 +0800 [thread overview]
Message-ID: <20210927072124.1564129-1-bmeng.cn@gmail.com> (raw)
At present the codes detect whether the DMA channel is claimed by:
claimed = !!s->chan[ch].control & CONTROL_CLAIM;
As ! has higher precedence over & (bitwise and), this is essentially
claimed = (!!s->chan[ch].control) & CONTROL_CLAIM;
which is wrong, as any non-zero bit set in the control register will
produce a result of a claimed channel.
Fixes: de7c7988d25d ("hw/dma: sifive_pdma: reset Next* registers when Control.claim is set")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
---
Changes in v2:
- reword the commit message
hw/dma/sifive_pdma.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/dma/sifive_pdma.c b/hw/dma/sifive_pdma.c
index b4fd40573a..b8ec7621f3 100644
--- a/hw/dma/sifive_pdma.c
+++ b/hw/dma/sifive_pdma.c
@@ -243,7 +243,7 @@ static void sifive_pdma_write(void *opaque, hwaddr offset,
offset &= 0xfff;
switch (offset) {
case DMA_CONTROL:
- claimed = !!s->chan[ch].control & CONTROL_CLAIM;
+ claimed = !!(s->chan[ch].control & CONTROL_CLAIM);
if (!claimed && (value & CONTROL_CLAIM)) {
/* reset Next* registers */
--
2.25.1
next reply other threads:[~2021-09-27 7:22 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-27 7:21 Bin Meng [this message]
2021-09-27 7:21 ` [PATCH v2 2/2] hw/dma: sifive_pdma: Don't run DMA when channel is disclaimed Bin Meng
2021-09-28 22:46 ` Alistair Francis
2021-09-28 23:15 ` Alistair Francis
2021-09-27 12:56 ` [PATCH v2 1/2] hw/dma: sifive_pdma: Fix Control.claim bit detection Philippe Mathieu-Daudé
2021-09-27 13:14 ` Bin Meng
2021-09-28 22:45 ` Alistair Francis
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