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[213.175.37.10]) by smtp.gmail.com with ESMTPSA id cn8sm1082336edb.77.2021.09.30.01.34.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Sep 2021 01:34:26 -0700 (PDT) Date: Thu, 30 Sep 2021 10:34:24 +0200 From: Igor Mammedov To: "Michael S. Tsirkin" Subject: Re: [PULL 1/5] hw/pcie-root-port: Fix hotplug for PCI devices requiring IO Message-ID: <20210930103424.5f408978@redhat.com> In-Reply-To: <20210929172519-mutt-send-email-mst@kernel.org> References: <20210803205043.165034-1-mst@redhat.com> <20210803205043.165034-2-mst@redhat.com> <20210927053932-mutt-send-email-mst@kernel.org> <20210929172519-mutt-send-email-mst@kernel.org> X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.33; x86_64-redhat-linux-gnu) MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=imammedo@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=216.205.24.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marcel@redhat.com, Peter Maydell , "Daniel P. =?UTF-8?B?QmVycmFuZ8Op?=" , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, 29 Sep 2021 17:47:37 -0400 "Michael S. Tsirkin" wrote: > On Wed, Sep 29, 2021 at 04:41:49PM +0300, Marcel Apfelbaum wrote: > > Hi=C2=A0Michael, > >=20 > > On Mon, Sep 27, 2021 at 12:49 PM Michael S. Tsirkin wr= ote: > >=20 > > On Mon, Sep 27, 2021 at 10:33:42AM +0100, Daniel P. Berrang=C3=A9 w= rote: =20 > > > On Tue, Aug 03, 2021 at 04:52:03PM -0400, Michael S. Tsirkin wrot= e: =20 > > > > From: Marcel Apfelbaum > > > > > > > > Q35 has now ACPI hotplug enabled by default for PCI(e) devices. > > > > As opposed to native PCIe hotplug, guests like Fedora 34 > > > > will not assign IO range to pcie-root-ports not supporting > > > > native hotplug, resulting into a regression. > > > > > > > > Reproduce by: > > > >=C2=A0 =C2=A0 =C2=A0qemu-bin -M q35 -device pcie-root-port,id=3D= p1 -monitor stdio > > > >=C2=A0 =C2=A0 =C2=A0device_add e1000,bus=3Dp1 > > > > In the Guest OS the respective pcie-root-port will have the IO = range > > > > disabled. > > > > > > > > Fix it by setting the "reserve-io" hint capability of the > > > > pcie-root-ports so the firmware will allocate the IO range inst= ead. > > > > > > > > Acked-by: Igor Mammedov > > > > Signed-off-by: Marcel Apfelbaum > > > > Message-Id: <20210802090057.1709775-1-marcel@redhat.com> > > > > Reviewed-by: Michael S. Tsirkin > > > > Signed-off-by: Michael S. Tsirkin > > > > --- > > > >=C2=A0 hw/pci-bridge/gen_pcie_root_port.c | 5 +++++ > > > >=C2=A0 1 file changed, 5 insertions(+) =20 > > > > > > This change, when combined with the switch to ACPI based hotplug = by > > > default, is responsible for a significant regression in QEMU 6.1.= 0 > > > > > > It is no longer possible to have more than 15 pcie-root-port devi= ces > > > added to a q35 VM in 6.1.0.=C2=A0 Before this I've had as many as= 80+ devices > > > present before I stopped trying to add more. > > > > > >=C2=A0 =C2=A0https://gitlab.com/qemu-project/qemu/-/issues/641 > > > > > > This regression is significant, because it has broken the out of = the > > > box default configuration that OpenStack uses for booting all VMs= . > > > They add 16 pcie-root-ports by defalt to allow empty slots for de= vice > > > hotplug under q35 [1]. =20 > >=20 > >=20 > > Indeed, oops. Thanks for the report! > >=20 > > Going back and looking at seabios code, didn't we get confused? > > Shouldn't we have reserved memory and not IO? > >=20 > >=20 > > We need the IO space for the legacy PCI bridges, otherwise an empty PCI= bridge > > will become unusable. =20 >=20 > Maybe we should go back to using OSC then ... the issue > is we can't then mix acpi and native hotplug for bridges. How OSC could help with the issue? > >=20 > >=20 > > I see: > > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 int resource_optional =3D= pcie_cap && (type =3D=3D > > PCI_REGION_TYPE_IO); > > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (!sum && hotplug_suppo= rt && !resource_optional) > > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 sum =3D ali= gn; /* reserve min size for hot-plug */ > >=20 > >=20 > > generally maybe we should just add an ACPI-hotplug capability and > > teach seabios about it? > >=20 > >=20 > > I suppose it is possible. > >=20 > > Thanks, > > Marcel > > =C2=A0 > >=20 > >=20 > > Marcel? > > =20 > > > > diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge= / =20 > > gen_pcie_root_port.c =20 > > > > index ec9907917e..20099a8ae3 100644 > > > > --- a/hw/pci-bridge/gen_pcie_root_port.c > > > > +++ b/hw/pci-bridge/gen_pcie_root_port.c > > > > @@ -28,6 +28,7 @@ OBJECT_DECLARE_SIMPLE_TYPE(GenPCIERootPort, = =20 > > GEN_PCIE_ROOT_PORT) =20 > > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (GEN_PCIE_ROOT_PORT_AER_OFFSE= T + PCI_ERR_SIZEOF) > > > >=C2=A0 > > > >=C2=A0 #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR=C2=A0 =C2=A0 = =C2=A0 =C2=A01 > > > > +#define GEN_PCIE_ROOT_DEFAULT_IO_RANGE=C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 4096 > > > >=C2=A0 > > > >=C2=A0 struct GenPCIERootPort { > > > >=C2=A0 =C2=A0 =C2=A0 /*< private >*/ > > > > @@ -75,6 +76,7 @@ static bool gen_rp_test_migrate_msix(void *op= aque, =20 > > int version_id) =20 > > > >=C2=A0 static void gen_rp_realize(DeviceState *dev, Error **errp= ) > > > >=C2=A0 { > > > >=C2=A0 =C2=A0 =C2=A0 PCIDevice *d =3D PCI_DEVICE(dev); > > > > +=C2=A0 =C2=A0 PCIESlot *s =3D PCIE_SLOT(d); > > > >=C2=A0 =C2=A0 =C2=A0 GenPCIERootPort *grp =3D GEN_PCIE_ROOT_PORT= (d); > > > >=C2=A0 =C2=A0 =C2=A0 PCIERootPortClass *rpc =3D PCIE_ROOT_PORT_G= ET_CLASS(d); > > > >=C2=A0 =C2=A0 =C2=A0 Error *local_err =3D NULL; > > > > @@ -85,6 +87,9 @@ static void gen_rp_realize(DeviceState *dev, = Error =20 > > **errp) =20 > > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return; > > > >=C2=A0 =C2=A0 =C2=A0 } > > > >=C2=A0 > > > > +=C2=A0 =C2=A0 if (grp->res_reserve.io =3D=3D -1 && s->hotplug = && !s->native_hotplug) =20 > > { =20 > > > > +=C2=A0 =C2=A0 =C2=A0 =C2=A0 grp->res_reserve.io =3D GEN_PCIE_R= OOT_DEFAULT_IO_RANGE; > > > > +=C2=A0 =C2=A0 } > > > >=C2=A0 =C2=A0 =C2=A0 int rc =3D pci_bridge_qemu_reserve_cap_init= (d, 0, > > > >=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 = =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2= =A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 grp->res_reserve, errp); > > > >=C2=A0 > > > > -- > > > > MST > > > > > > > > =20 > > > > > > Regards, > > > Daniel > > > > > > [1] https://github.com/openstack/tripleo-heat-templates/blob/ =20 > > 7a6cd0640ec390a330f5699d8ed60f71b2a9f514/deployment/nova/ > > nova-compute-container-puppet.yaml#L462-L472 =20 > > > -- > > > |: https://berrange.com=C2=A0 =C2=A0 =C2=A0 -o-=C2=A0 =C2=A0 http= s://www.flickr.com/photos/ =20 > > dberrange :| =20 > > > |: https://libvirt.org=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0-o-=C2=A0= =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 https:// =20 > > fstop138.berrange.com :| =20 > > > |: https://entangle-photo.org=C2=A0 =C2=A0 -o-=C2=A0 =C2=A0 https= ://www.instagram.com/ =20 > > dberrange :| > >=20 > > =20 >=20