From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DBBB9C433EF for ; Wed, 6 Oct 2021 17:38:06 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5ECFD610E6 for ; Wed, 6 Oct 2021 17:38:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5ECFD610E6 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48512 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mYArl-0007Yb-In for qemu-devel@archiver.kernel.org; Wed, 06 Oct 2021 13:38:05 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48400) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mYAdZ-0007C4-C8 for qemu-devel@nongnu.org; Wed, 06 Oct 2021 13:23:26 -0400 Received: from mail-pj1-x1036.google.com ([2607:f8b0:4864:20::1036]:50897) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mYAdV-00083I-Da for qemu-devel@nongnu.org; Wed, 06 Oct 2021 13:23:25 -0400 Received: by mail-pj1-x1036.google.com with SMTP id k23so2777539pji.0 for ; Wed, 06 Oct 2021 10:23:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZzAawtJd8OTP3Nl7fVraqHpZdPOKflLcxVaYtt4CqfY=; b=RSDWtPyMbYIuWj0JqBLoJOdek//N5EnVujGRLrcoZ4s+rCEJwTVTF6eRi7KDzcubr3 8Sfw+xPMx9lnWBoX+rYh9bhhNNAVHYfHOjiRu0gcj9TAJEja9h8jSp5IsjtjjvKe/5UO Jzmn4rQldeLAwgLBmKUk64HrUPIajPHAuydKoZjaKs0AwRqPfqP/f/vnzNkY3Gmh1LDo lEX7plJLOdYLWGXXUlELVo1rRoCERsc8eK+76KvssiWowUCb+B4yrzGHXa/JKoDndeKT S1gs9fzyh5wCiwsdAdI9MxXM9SiAeTax/vrHK4AFKWxBalrHiIzZCtoX2nI5m51hr4oD qPIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZzAawtJd8OTP3Nl7fVraqHpZdPOKflLcxVaYtt4CqfY=; b=ErVxNt93NsEuj5a4ARuMsSfNXLrwk9yuJ6QAJfuCtTUzE8CVbUn4ms6nEsrh3VMJpN bcngVPTkJdUy/SnnRyqE50GPy+wMZ7SBeXcTQMEKryGflIQhIUoBF1DbqQOifM0xF5Yn RM5j9UDrK5Qc+KqLMplTI6ZliHGBBItTg8aoMoD9rOsxPRDEsOWR2wcwaMpVT6jzsI9F i7TCXa6R9MDqc8L1SyBvo/+cGJV1p/ouPekqCpSu72QYmEzkgS4vsLNqGilurirNlq01 OmlzspYVtwxsq1bMGanqExlPuU6EntKAG+NGQ2poVJMf4XU8WBSDjmNMe4p3ZUDSQXWC io/w== X-Gm-Message-State: AOAM530dhB/yk2YYib4A2MMeuTbCYr7sjeteeLpO34EyCcgwFTtNICfZ jtC5Hob+0bHil1CxMPuCspvaxoQqbETh+Q== X-Google-Smtp-Source: ABdhPJyhEhOU6X+jluE6bAhjAFjAMKRVMUMyeBnwKhEDv1bcDRT78tGyBmcPiT09Gv7bAhe8ptKcNA== X-Received: by 2002:a17:90b:224e:: with SMTP id hk14mr12319282pjb.224.1633541000132; Wed, 06 Oct 2021 10:23:20 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id w7sm21606929pfj.189.2021.10.06.10.23.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 10:23:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 14/41] linux-user/host/mips: Populate host_signal.h Date: Wed, 6 Oct 2021 10:22:40 -0700 Message-Id: <20211006172307.780893-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211006172307.780893-1-richard.henderson@linaro.org> References: <20211006172307.780893-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split host_signal_pc and host_signal_write out of user-exec.c. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/host/mips/host-signal.h | 62 +++++++++++++++++++++++++++++- accel/tcg/user-exec.c | 52 +------------------------ 2 files changed, 62 insertions(+), 52 deletions(-) diff --git a/linux-user/host/mips/host-signal.h b/linux-user/host/mips/host-signal.h index f4b4d65031..9c83e51130 100644 --- a/linux-user/host/mips/host-signal.h +++ b/linux-user/host/mips/host-signal.h @@ -1 +1,61 @@ -#define HOST_SIGNAL_PLACEHOLDER +/* + * host-signal.h: signal info dependent on the host architecture + * + * Copyright (C) 2021 Linaro Limited + * + * This work is licensed under the terms of the GNU GPL, version 2 or later. + * See the COPYING file in the top-level directory. + */ + +#ifndef MIPS_HOST_SIGNAL_H +#define MIPS_HOST_SIGNAL_H + +static inline uintptr_t host_signal_pc(ucontext_t *uc) +{ + return uc->uc_mcontext.pc; +} + +#if defined(__misp16) || defined(__mips_micromips) +#error "Unsupported encoding" +#endif + +static inline bool host_signal_write(siginfo_t *info, ucontext_t *uc) +{ + uint32_t insn = *(uint32_t *)host_signal_pc(uc); + + /* Detect all store instructions at program counter. */ + switch ((insn >> 26) & 077) { + case 050: /* SB */ + case 051: /* SH */ + case 052: /* SWL */ + case 053: /* SW */ + case 054: /* SDL */ + case 055: /* SDR */ + case 056: /* SWR */ + case 070: /* SC */ + case 071: /* SWC1 */ + case 074: /* SCD */ + case 075: /* SDC1 */ + case 077: /* SD */ +#if !defined(__mips_isa_rev) || __mips_isa_rev < 6 + case 072: /* SWC2 */ + case 076: /* SDC2 */ +#endif + return true; + case 023: /* COP1X */ + /* + * Required in all versions of MIPS64 since + * MIPS64r1 and subsequent versions of MIPS32r2. + */ + switch (insn & 077) { + case 010: /* SWXC1 */ + case 011: /* SDXC1 */ + case 015: /* SUXC1 */ + return true; + } + break; + } + return false; +} + +#endif diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 738da08a2b..fe3a3ce6e2 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -255,57 +255,7 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size, return size ? g2h(env_cpu(env), addr) : NULL; } -#if defined(__mips__) - -#if defined(__misp16) || defined(__mips_micromips) -#error "Unsupported encoding" -#endif - -int cpu_signal_handler(int host_signum, void *pinfo, - void *puc) -{ - siginfo_t *info = pinfo; - ucontext_t *uc = puc; - uintptr_t pc = uc->uc_mcontext.pc; - uint32_t insn = *(uint32_t *)pc; - int is_write = 0; - - /* Detect all store instructions at program counter. */ - switch((insn >> 26) & 077) { - case 050: /* SB */ - case 051: /* SH */ - case 052: /* SWL */ - case 053: /* SW */ - case 054: /* SDL */ - case 055: /* SDR */ - case 056: /* SWR */ - case 070: /* SC */ - case 071: /* SWC1 */ - case 074: /* SCD */ - case 075: /* SDC1 */ - case 077: /* SD */ -#if !defined(__mips_isa_rev) || __mips_isa_rev < 6 - case 072: /* SWC2 */ - case 076: /* SDC2 */ -#endif - is_write = 1; - break; - case 023: /* COP1X */ - /* Required in all versions of MIPS64 since - MIPS64r1 and subsequent versions of MIPS32r2. */ - switch (insn & 077) { - case 010: /* SWXC1 */ - case 011: /* SDXC1 */ - case 015: /* SUXC1 */ - is_write = 1; - } - break; - } - - return handle_cpu_signal(pc, info, is_write, &uc->uc_sigmask); -} - -#elif defined(__riscv) +#if defined(__riscv) int cpu_signal_handler(int host_signum, void *pinfo, void *puc) -- 2.25.1