From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id C3746C433F5 for ; Wed, 6 Oct 2021 17:31:45 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 5AFB160F22 for ; Wed, 6 Oct 2021 17:31:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 5AFB160F22 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:59860 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mYAlc-0004iT-FM for qemu-devel@archiver.kernel.org; Wed, 06 Oct 2021 13:31:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48340) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mYAdX-0007AO-Eq for qemu-devel@nongnu.org; Wed, 06 Oct 2021 13:23:24 -0400 Received: from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a]:41708) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mYAdL-0007t2-91 for qemu-devel@nongnu.org; Wed, 06 Oct 2021 13:23:21 -0400 Received: by mail-pl1-x62a.google.com with SMTP id x8so2095119plv.8 for ; Wed, 06 Oct 2021 10:23:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0OjcYIvt5cZDMeQxQIFG6cjnzijWUogIdN+aKc+TMuQ=; b=N3YHG6h1k4r13SgB/JwEqNRUgl7K51SG4hv7M9P0rEn9CxaFJ1R8jK5WH+BlpiBWBK zTCNKkWeIzfkf/3hx6xZ5D4iOL6Xfuw1SDqv+zvz4q3xSkXrjvxjWmg/rhTHMQMpgBvO wcw+DCtp2BZhwpjvPMrSdXQk5Apwfz36mysNaV5yuCvJPVE+9FQhv9xYXOAj51LIBjXW WfXtakkwp6nU4dbpz2LWso5pHRNLhGsEnaay6CZ+h7eKlIgzwjmmhNt76Z/7TEOHm/5p 9Hz1/MLDztZonFeKpUVTv4ikAgBigNuXNTHS9IpdC3+smwGTB+SZxTjlw5CoxKLDtf7w 5f8A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0OjcYIvt5cZDMeQxQIFG6cjnzijWUogIdN+aKc+TMuQ=; b=zxBzKNfgHH0IOsz+zRFWzlheEML4taq9ewsqKGndKcOvy0WsMndkzZ/2KmYIWvzJB4 +Dj7cSOkI6KUvTqRXleatwD78mmqQ+EQNswDGmoRzz5T6YbTDvLoghUbyJhzCE9jhvAz wAMmjDN9D9dLW1a643sz4L3FAzGR/Y59c4TaiMbm0GtdOU/0vC+1bjBU5ap0GXi3Z2SH nvMO0VK6EWCUglfdpnzEadCzegO24OuNtudhW4ROoB46vKC/JFp3IJqZnSIvUa+mLwX0 A+sTHzAOTggHc+fOehioah98FlLNY6nN2bOtLbaxe1KV0bp0PsOQk+RbGSFqftmS7q78 99Tw== X-Gm-Message-State: AOAM533aVolGWz3zowH4ek231i1xGm7TIVkY3X2/6tfornQdSDUtALb9 L3SCHLvfkgUfL69NiPX0XLi1H9+L6tRXzA== X-Google-Smtp-Source: ABdhPJy32qTW3W34tZUYKGPy/lXDPHgyV6R1U2lrMxaxHeMUE+BaIA8dCpXDgD9tcaLIh9fvbrmanQ== X-Received: by 2002:a17:90b:3797:: with SMTP id mz23mr12353331pjb.216.1633540989807; Wed, 06 Oct 2021 10:23:09 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id w7sm21606929pfj.189.2021.10.06.10.23.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 06 Oct 2021 10:23:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v4 01/41] accel/tcg: Split out adjust_signal_pc Date: Wed, 6 Oct 2021 10:22:27 -0700 Message-Id: <20211006172307.780893-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211006172307.780893-1-richard.henderson@linaro.org> References: <20211006172307.780893-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alex.bennee@linaro.org, laurent@vivier.eu, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Split out a function to adjust the raw signal pc into a value that could be passed to cpu_restore_state. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- v2: Adjust pc in place; return MMUAccessType. --- include/exec/exec-all.h | 10 ++++++++++ accel/tcg/user-exec.c | 41 +++++++++++++++++++++++++---------------- 2 files changed, 35 insertions(+), 16 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 9d5987ba04..e54f8e5d65 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -663,6 +663,16 @@ static inline tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, return addr; } +/** + * adjust_signal_pc: + * @pc: raw pc from the host signal ucontext_t. + * @is_write: host memory operation was write, or read-modify-write. + * + * Alter @pc as required for unwinding. Return the type of the + * guest memory access -- host reads may be for guest execution. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write); + /** * cpu_signal_handler * @signum: host signal number diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 65d3c9b286..9feec76fb6 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -57,18 +57,11 @@ static void QEMU_NORETURN cpu_exit_tb_from_sighandler(CPUState *cpu, cpu_loop_exit_noexc(cpu); } -/* 'pc' is the host PC at which the exception was raised. 'address' is - the effective address of the memory exception. 'is_write' is 1 if a - write caused the exception and otherwise 0'. 'old_set' is the - signal set which should be restored */ -static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, - int is_write, sigset_t *old_set) +/* + * Adjust the pc to pass to cpu_restore_state; return the memop type. + */ +MMUAccessType adjust_signal_pc(uintptr_t *pc, bool is_write) { - CPUState *cpu = current_cpu; - CPUClass *cc; - unsigned long address = (unsigned long)info->si_addr; - MMUAccessType access_type = is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; - switch (helper_retaddr) { default: /* @@ -77,7 +70,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * pointer into the generated code that will unwind to the * correct guest pc. */ - pc = helper_retaddr; + *pc = helper_retaddr; break; case 0: @@ -97,7 +90,7 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * Therefore, adjust to compensate for what will be done later * by cpu_restore_state_from_tb. */ - pc += GETPC_ADJ; + *pc += GETPC_ADJ; break; case 1: @@ -113,12 +106,28 @@ static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, * * Like tb_gen_code, release the memory lock before cpu_loop_exit. */ - pc = 0; - access_type = MMU_INST_FETCH; mmap_unlock(); - break; + *pc = 0; + return MMU_INST_FETCH; } + return is_write ? MMU_DATA_STORE : MMU_DATA_LOAD; +} + +/* + * 'pc' is the host PC at which the exception was raised. + * 'address' is the effective address of the memory exception. + * 'is_write' is 1 if a write caused the exception and otherwise 0. + * 'old_set' is the signal set which should be restored. + */ +static inline int handle_cpu_signal(uintptr_t pc, siginfo_t *info, + int is_write, sigset_t *old_set) +{ + CPUState *cpu = current_cpu; + CPUClass *cc; + unsigned long address = (unsigned long)info->si_addr; + MMUAccessType access_type = adjust_signal_pc(&pc, is_write); + /* For synchronous signals we expect to be coming from the vCPU * thread (so current_cpu should be valid) and either from running * code or during translation which can fault as we cross pages. -- 2.25.1