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Wed, 6 Oct 2021 23:49:42 -0700 (PDT) Received: from toolbox.wdc.com (unknown [10.225.165.32]) by usg-ed-osssrv.wdc.com (Postfix) with ESMTPSA id 4HQ24K4rnnz1RvTg; Wed, 6 Oct 2021 23:49:36 -0700 (PDT) From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Cc: alistair23@gmail.com, Frank Chang , Vincent Chen , Richard Henderson , Alistair Francis Subject: [PULL 17/26] target/riscv: Set mstatus_hs.[SD|FS] bits if Clean and V=1 in mark_fs_dirty() Date: Thu, 7 Oct 2021 16:47:42 +1000 Message-Id: <20211007064751.608580-18-alistair.francis@opensource.wdc.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20211007064751.608580-1-alistair.francis@opensource.wdc.com> References: <20211007064751.608580-1-alistair.francis@opensource.wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=68.232.141.245; envelope-from=prvs=907902f29=alistair.francis@opensource.wdc.com; helo=esa1.hgst.iphmx.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Frank Chang When V=3D1, both vsstauts.FS and HS-level sstatus.FS are in effect. Modifying the floating-point state when V=3D1 causes both fields to be set to 3 (Dirty). However, it's possible that HS-level sstatus.FS is Clean and VS-level vsstatus.FS is Dirty at the time mark_fs_dirty() is called when V=3D1. We can't early return for this case because we still need to set sstatus.FS to Dirty according to spec. Signed-off-by: Frank Chang Reviewed-by: Vincent Chen Tested-by: Vincent Chen Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Message-id: 20210921020234.123448-1-frank.chang@sifive.com Signed-off-by: Alistair Francis --- target/riscv/cpu.h | 4 ++++ target/riscv/translate.c | 30 +++++++++++++++++------------- 2 files changed, 21 insertions(+), 13 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index bd519c9090..9e55b2f5b1 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -393,6 +393,7 @@ FIELD(TB_FLAGS, SEW, 5, 3) FIELD(TB_FLAGS, VILL, 8, 1) /* Is a Hypervisor instruction load/store allowed? */ FIELD(TB_FLAGS, HLSX, 9, 1) +FIELD(TB_FLAGS, MSTATUS_HS_FS, 10, 2) =20 bool riscv_cpu_is_32bit(CPURISCVState *env); =20 @@ -449,6 +450,9 @@ static inline void cpu_get_tb_cpu_state(CPURISCVState= *env, target_ulong *pc, get_field(env->hstatus, HSTATUS_HU))) { flags =3D FIELD_DP32(flags, TB_FLAGS, HLSX, 1); } + + flags =3D FIELD_DP32(flags, TB_FLAGS, MSTATUS_HS_FS, + get_field(env->mstatus_hs, MSTATUS_FS)); } #endif =20 diff --git a/target/riscv/translate.c b/target/riscv/translate.c index b2d3444bc5..d2442f0cf5 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -58,6 +58,7 @@ typedef struct DisasContext { target_ulong misa; uint32_t opcode; uint32_t mstatus_fs; + uint32_t mstatus_hs_fs; uint32_t mem_idx; /* Remember the rounding mode encoded in the previous fp instruction= , which we have already installed into env->fp_status. Or -1 for @@ -280,27 +281,29 @@ static void gen_jal(DisasContext *ctx, int rd, targ= et_ulong imm) static void mark_fs_dirty(DisasContext *ctx) { TCGv tmp; - target_ulong sd; + target_ulong sd =3D is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD; =20 - if (ctx->mstatus_fs =3D=3D MSTATUS_FS) { - return; - } - /* Remember the state change for the rest of the TB. */ - ctx->mstatus_fs =3D MSTATUS_FS; + if (ctx->mstatus_fs !=3D MSTATUS_FS) { + /* Remember the state change for the rest of the TB. */ + ctx->mstatus_fs =3D MSTATUS_FS; =20 - tmp =3D tcg_temp_new(); - sd =3D is_32bit(ctx) ? MSTATUS32_SD : MSTATUS64_SD; + tmp =3D tcg_temp_new(); + tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); + tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); + tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); + tcg_temp_free(tmp); + } =20 - tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); - tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); - tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus)); + if (ctx->virt_enabled && ctx->mstatus_hs_fs !=3D MSTATUS_FS) { + /* Remember the stage change for the rest of the TB. */ + ctx->mstatus_hs_fs =3D MSTATUS_FS; =20 - if (ctx->virt_enabled) { + tmp =3D tcg_temp_new(); tcg_gen_ld_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs))= ; tcg_gen_ori_tl(tmp, tmp, MSTATUS_FS | sd); tcg_gen_st_tl(tmp, cpu_env, offsetof(CPURISCVState, mstatus_hs))= ; + tcg_temp_free(tmp); } - tcg_temp_free(tmp); } #else static inline void mark_fs_dirty(DisasContext *ctx) { } @@ -539,6 +542,7 @@ static void riscv_tr_init_disas_context(DisasContextB= ase *dcbase, CPUState *cs) ctx->frm =3D -1; /* unknown rounding mode */ ctx->ext_ifencei =3D cpu->cfg.ext_ifencei; ctx->vlen =3D cpu->cfg.vlen; + ctx->mstatus_hs_fs =3D FIELD_EX32(tb_flags, TB_FLAGS, MSTATUS_HS_FS)= ; ctx->hlsx =3D FIELD_EX32(tb_flags, TB_FLAGS, HLSX); ctx->vill =3D FIELD_EX32(tb_flags, TB_FLAGS, VILL); ctx->sew =3D FIELD_EX32(tb_flags, TB_FLAGS, SEW); --=20 2.31.1