From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B8C7FC433EF for ; Mon, 11 Oct 2021 11:24:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6F10B60C49 for ; Mon, 11 Oct 2021 11:24:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org 6F10B60C49 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=intel.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=nongnu.org Received: from localhost ([::1]:48912 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mZtQ4-0004SI-CM for qemu-devel@archiver.kernel.org; Mon, 11 Oct 2021 07:24:36 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:56584) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mZtNM-0001bU-Mc for qemu-devel@nongnu.org; Mon, 11 Oct 2021 07:21:48 -0400 Received: from mga04.intel.com ([192.55.52.120]:28240) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mZtNK-0008Kp-54 for qemu-devel@nongnu.org; Mon, 11 Oct 2021 07:21:48 -0400 X-IronPort-AV: E=McAfee;i="6200,9189,10133"; a="225624872" X-IronPort-AV: E=Sophos;i="5.85,364,1624345200"; d="scan'208";a="225624872" Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2021 04:21:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.85,364,1624345200"; d="scan'208";a="490432226" Received: from icx-2s.bj.intel.com ([10.240.193.41]) by orsmga008.jf.intel.com with ESMTP; 11 Oct 2021 04:21:36 -0700 From: Yang Zhong To: qemu-devel@nongnu.org Subject: [PATCH 5/6] numa: Enable numa for libvirt interface Date: Mon, 11 Oct 2021 19:15:53 +0800 Message-Id: <20211011111554.12403-6-yang.zhong@intel.com> X-Mailer: git-send-email 2.29.2.334.gfaefdd61ec In-Reply-To: <20211011111554.12403-1-yang.zhong@intel.com> References: <20211011111554.12403-1-yang.zhong@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=192.55.52.120; envelope-from=yang.zhong@intel.com; helo=mga04.intel.com X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, pbonzini@redhat.com, eblake@redhat.com, philmd@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Libvirt need get the detailed host SGX EPC capabilities to support numa function. Libvirt can decide how to allocate host EPC sections to guest numa from host numa info. (QEMU) query-sgx-capabilities {"return": {"sgx": true, "sgx2": true, "sgx1": true, "sections": \ [{"index": 0, "size": 17070817280}, {"index": 1, "size": 17079205888}], "flc": true}} Signed-off-by: Yang Zhong --- hw/i386/sgx.c | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/i386/sgx.c b/hw/i386/sgx.c index 8af45925c6..fe3034060d 100644 --- a/hw/i386/sgx.c +++ b/hw/i386/sgx.c @@ -74,11 +74,13 @@ static uint64_t sgx_calc_section_metric(uint64_t low, uint64_t high) ((high & MAKE_64BIT_MASK(0, 20)) << 32); } -static uint64_t sgx_calc_host_epc_section_size(void) +static SGXEPCSectionList *sgx_calc_host_epc_sections(void) { + SGXEPCSectionList *head = NULL, **tail = &head; + SGXEPCSection *section; uint32_t i, type; uint32_t eax, ebx, ecx, edx; - uint64_t size = 0; + uint32_t j = 0; for (i = 0; i < SGX_MAX_EPC_SECTIONS; i++) { host_cpuid(0x12, i + 2, &eax, &ebx, &ecx, &edx); @@ -92,10 +94,13 @@ static uint64_t sgx_calc_host_epc_section_size(void) break; } - size += sgx_calc_section_metric(ecx, edx); + section = g_new0(SGXEPCSection, 1); + section->index = j++; + section->size = sgx_calc_section_metric(ecx, edx); + QAPI_LIST_APPEND(tail, section); } - return size; + return head; } SGXInfo *sgx_get_capabilities(Error **errp) @@ -119,7 +124,7 @@ SGXInfo *sgx_get_capabilities(Error **errp) info->sgx1 = eax & (1U << 0) ? true : false; info->sgx2 = eax & (1U << 1) ? true : false; - info->section_size = sgx_calc_host_epc_section_size(); + info->sections = sgx_calc_host_epc_sections(); close(fd);