From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: David Hildenbrand <david@redhat.com>
Subject: [PULL 01/15] memory: Log access direction for invalid accesses
Date: Wed, 13 Oct 2021 11:22:25 -0700 [thread overview]
Message-ID: <20211013182239.991127-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211013182239.991127-1-richard.henderson@linaro.org>
From: BALATON Zoltan <balaton@eik.bme.hu>
In memory_region_access_valid() invalid accesses are logged to help
debugging but the log message does not say if it was a read or write.
Log that too to better identify the access causing the problem.
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <20211011173616.F1DE0756022@zero.eik.bme.hu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
softmmu/memory.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/softmmu/memory.c b/softmmu/memory.c
index db182e5d3d..e5826faa0c 100644
--- a/softmmu/memory.c
+++ b/softmmu/memory.c
@@ -1378,17 +1378,17 @@ bool memory_region_access_valid(MemoryRegion *mr,
{
if (mr->ops->valid.accepts
&& !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
- qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
- "0x%" HWADDR_PRIX ", size %u, "
- "region '%s', reason: rejected\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
+ ", size %u, region '%s', reason: rejected\n",
+ is_write ? "write" : "read",
addr, size, memory_region_name(mr));
return false;
}
if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
- qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
- "0x%" HWADDR_PRIX ", size %u, "
- "region '%s', reason: unaligned\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
+ ", size %u, region '%s', reason: unaligned\n",
+ is_write ? "write" : "read",
addr, size, memory_region_name(mr));
return false;
}
@@ -1400,10 +1400,10 @@ bool memory_region_access_valid(MemoryRegion *mr,
if (size > mr->ops->valid.max_access_size
|| size < mr->ops->valid.min_access_size) {
- qemu_log_mask(LOG_GUEST_ERROR, "Invalid access at addr "
- "0x%" HWADDR_PRIX ", size %u, "
- "region '%s', reason: invalid size "
- "(min:%u max:%u)\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
+ ", size %u, region '%s', reason: invalid size "
+ "(min:%u max:%u)\n",
+ is_write ? "write" : "read",
addr, size, memory_region_name(mr),
mr->ops->valid.min_access_size,
mr->ops->valid.max_access_size);
--
2.25.1
next prev parent reply other threads:[~2021-10-13 18:25 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-13 18:22 [PULL 00/15] tcg patch queue Richard Henderson
2021-10-13 18:22 ` Richard Henderson [this message]
2021-10-13 18:22 ` [PULL 02/15] target/arm: Use MO_128 for 16 byte atomics Richard Henderson
2021-10-13 18:22 ` [PULL 03/15] target/i386: " Richard Henderson
2021-10-13 18:22 ` [PULL 04/15] target/ppc: " Richard Henderson
2021-10-13 18:22 ` [PULL 05/15] target/s390x: " Richard Henderson
2021-10-13 18:22 ` [PULL 06/15] target/hexagon: Implement cpu_mmu_index Richard Henderson
2021-10-13 18:22 ` [PULL 07/15] accel/tcg: Add cpu_{ld,st}*_mmu interfaces Richard Henderson
2021-10-13 18:22 ` [PULL 08/15] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h Richard Henderson
2021-10-13 18:22 ` [PULL 09/15] target/mips: Use cpu_*_data_ra for msa load/store Richard Henderson
2021-10-13 18:22 ` [PULL 10/15] target/mips: Use 8-byte memory ops " Richard Henderson
2021-10-13 18:22 ` [PULL 11/15] target/s390x: Use cpu_*_mmu instead of helper_*_mmu Richard Henderson
2021-10-13 18:22 ` [PULL 12/15] target/sparc: " Richard Henderson
2021-10-13 18:22 ` [PULL 13/15] target/arm: " Richard Henderson
2021-10-13 18:22 ` [PULL 14/15] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h Richard Henderson
2021-10-13 18:22 ` [PULL 15/15] tcg: Canonicalize alignment flags in MemOp Richard Henderson
2021-10-13 19:55 ` [PULL 00/15] tcg patch queue Richard Henderson
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