From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 02/15] target/arm: Use MO_128 for 16 byte atomics
Date: Wed, 13 Oct 2021 11:22:26 -0700 [thread overview]
Message-ID: <20211013182239.991127-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211013182239.991127-1-richard.henderson@linaro.org>
Cc: qemu-arm@nongnu.org
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper-a64.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c
index c5af779006..4cafd3c11a 100644
--- a/target/arm/helper-a64.c
+++ b/target/arm/helper-a64.c
@@ -560,7 +560,7 @@ uint64_t HELPER(paired_cmpxchg64_le_parallel)(CPUARMState *env, uint64_t addr,
assert(HAVE_CMPXCHG128);
mem_idx = cpu_mmu_index(env, false);
- oi = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);
+ oi = make_memop_idx(MO_LE | MO_128 | MO_ALIGN, mem_idx);
cmpv = int128_make128(env->exclusive_val, env->exclusive_high);
newv = int128_make128(new_lo, new_hi);
@@ -630,7 +630,7 @@ uint64_t HELPER(paired_cmpxchg64_be_parallel)(CPUARMState *env, uint64_t addr,
assert(HAVE_CMPXCHG128);
mem_idx = cpu_mmu_index(env, false);
- oi = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);
+ oi = make_memop_idx(MO_BE | MO_128 | MO_ALIGN, mem_idx);
/*
* High and low need to be switched here because this is not actually a
@@ -656,7 +656,7 @@ void HELPER(casp_le_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
assert(HAVE_CMPXCHG128);
mem_idx = cpu_mmu_index(env, false);
- oi = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);
+ oi = make_memop_idx(MO_LE | MO_128 | MO_ALIGN, mem_idx);
cmpv = int128_make128(env->xregs[rs], env->xregs[rs + 1]);
newv = int128_make128(new_lo, new_hi);
@@ -677,7 +677,7 @@ void HELPER(casp_be_parallel)(CPUARMState *env, uint32_t rs, uint64_t addr,
assert(HAVE_CMPXCHG128);
mem_idx = cpu_mmu_index(env, false);
- oi = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx);
+ oi = make_memop_idx(MO_LE | MO_128 | MO_ALIGN, mem_idx);
cmpv = int128_make128(env->xregs[rs + 1], env->xregs[rs]);
newv = int128_make128(new_lo, new_hi);
--
2.25.1
next prev parent reply other threads:[~2021-10-13 18:25 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-13 18:22 [PULL 00/15] tcg patch queue Richard Henderson
2021-10-13 18:22 ` [PULL 01/15] memory: Log access direction for invalid accesses Richard Henderson
2021-10-13 18:22 ` Richard Henderson [this message]
2021-10-13 18:22 ` [PULL 03/15] target/i386: Use MO_128 for 16 byte atomics Richard Henderson
2021-10-13 18:22 ` [PULL 04/15] target/ppc: " Richard Henderson
2021-10-13 18:22 ` [PULL 05/15] target/s390x: " Richard Henderson
2021-10-13 18:22 ` [PULL 06/15] target/hexagon: Implement cpu_mmu_index Richard Henderson
2021-10-13 18:22 ` [PULL 07/15] accel/tcg: Add cpu_{ld,st}*_mmu interfaces Richard Henderson
2021-10-13 18:22 ` [PULL 08/15] accel/tcg: Move cpu_atomic decls to exec/cpu_ldst.h Richard Henderson
2021-10-13 18:22 ` [PULL 09/15] target/mips: Use cpu_*_data_ra for msa load/store Richard Henderson
2021-10-13 18:22 ` [PULL 10/15] target/mips: Use 8-byte memory ops " Richard Henderson
2021-10-13 18:22 ` [PULL 11/15] target/s390x: Use cpu_*_mmu instead of helper_*_mmu Richard Henderson
2021-10-13 18:22 ` [PULL 12/15] target/sparc: " Richard Henderson
2021-10-13 18:22 ` [PULL 13/15] target/arm: " Richard Henderson
2021-10-13 18:22 ` [PULL 14/15] tcg: Move helper_*_mmu decls to tcg/tcg-ldst.h Richard Henderson
2021-10-13 18:22 ` [PULL 15/15] tcg: Canonicalize alignment flags in MemOp Richard Henderson
2021-10-13 19:55 ` [PULL 00/15] tcg patch queue Richard Henderson
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