From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Laurent Vivier <laurent@vivier.eu>
Subject: [PULL 10/24] target/m68k: Drop checks for singlestep_enabled
Date: Sat, 16 Oct 2021 11:15:00 -0700 [thread overview]
Message-ID: <20211016181514.3165661-11-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211016181514.3165661-1-richard.henderson@linaro.org>
GDB single-stepping is now handled generically.
Acked-by: Laurent Vivier <laurent@vivier.eu>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/m68k/translate.c | 44 +++++++++--------------------------------
1 file changed, 9 insertions(+), 35 deletions(-)
diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index 50a55f949c..af43c8eab8 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -194,18 +194,6 @@ static void do_writebacks(DisasContext *s)
}
}
-static bool is_singlestepping(DisasContext *s)
-{
- /*
- * Return true if we are singlestepping either because of
- * architectural singlestep or QEMU gdbstub singlestep. This does
- * not include the command line '-singlestep' mode which is rather
- * misnamed as it only means "one instruction per TB" and doesn't
- * affect the code we generate.
- */
- return s->base.singlestep_enabled || s->ss_active;
-}
-
/* is_jmp field values */
#define DISAS_JUMP DISAS_TARGET_0 /* only pc was modified dynamically */
#define DISAS_EXIT DISAS_TARGET_1 /* cpu state was modified dynamically */
@@ -320,20 +308,6 @@ static void gen_exception(DisasContext *s, uint32_t dest, int nr)
s->base.is_jmp = DISAS_NORETURN;
}
-static void gen_singlestep_exception(DisasContext *s)
-{
- /*
- * Generate the right kind of exception for singlestep, which is
- * either the architectural singlestep or EXCP_DEBUG for QEMU's
- * gdb singlestepping.
- */
- if (s->ss_active) {
- gen_raise_exception(EXCP_TRACE);
- } else {
- gen_raise_exception(EXCP_DEBUG);
- }
-}
-
static inline void gen_addr_fault(DisasContext *s)
{
gen_exception(s, s->base.pc_next, EXCP_ADDRESS);
@@ -1522,10 +1496,10 @@ static void gen_exit_tb(DisasContext *s)
/* Generate a jump to an immediate address. */
static void gen_jmp_tb(DisasContext *s, int n, uint32_t dest)
{
- if (unlikely(is_singlestepping(s))) {
+ if (unlikely(s->ss_active)) {
update_cc_op(s);
tcg_gen_movi_i32(QREG_PC, dest);
- gen_singlestep_exception(s);
+ gen_raise_exception(EXCP_TRACE);
} else if (translator_use_goto_tb(&s->base, dest)) {
tcg_gen_goto_tb(n);
tcg_gen_movi_i32(QREG_PC, dest);
@@ -6193,7 +6167,7 @@ static void m68k_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cpu)
dc->ss_active = (M68K_SR_TRACE(env->sr) == M68K_SR_TRACE_ANY_INS);
/* If architectural single step active, limit to 1 */
- if (is_singlestepping(dc)) {
+ if (dc->ss_active) {
dc->base.max_insns = 1;
}
}
@@ -6252,17 +6226,17 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
break;
case DISAS_TOO_MANY:
update_cc_op(dc);
- if (is_singlestepping(dc)) {
+ if (dc->ss_active) {
tcg_gen_movi_i32(QREG_PC, dc->pc);
- gen_singlestep_exception(dc);
+ gen_raise_exception(EXCP_TRACE);
} else {
gen_jmp_tb(dc, 0, dc->pc);
}
break;
case DISAS_JUMP:
/* We updated CC_OP and PC in gen_jmp/gen_jmp_im. */
- if (is_singlestepping(dc)) {
- gen_singlestep_exception(dc);
+ if (dc->ss_active) {
+ gen_raise_exception(EXCP_TRACE);
} else {
tcg_gen_lookup_and_goto_ptr();
}
@@ -6272,8 +6246,8 @@ static void m68k_tr_tb_stop(DisasContextBase *dcbase, CPUState *cpu)
* We updated CC_OP and PC in gen_exit_tb, but also modified
* other state that may require returning to the main loop.
*/
- if (is_singlestepping(dc)) {
- gen_singlestep_exception(dc);
+ if (dc->ss_active) {
+ gen_raise_exception(EXCP_TRACE);
} else {
tcg_gen_exit_tb(NULL, 0);
}
--
2.25.1
next prev parent reply other threads:[~2021-10-16 18:24 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-16 18:14 [PULL 00/24] tcg patch queue Richard Henderson
2021-10-16 18:14 ` [PULL 01/24] accel/tcg: Handle gdb singlestep in cpu_tb_exec Richard Henderson
2021-10-16 18:14 ` [PULL 02/24] target/alpha: Drop checks for singlestep_enabled Richard Henderson
2021-10-16 18:14 ` [PULL 03/24] target/avr: " Richard Henderson
2021-10-16 18:14 ` [PULL 04/24] target/cris: " Richard Henderson
2021-10-16 18:14 ` [PULL 05/24] target/hexagon: " Richard Henderson
2021-10-16 18:14 ` [PULL 06/24] target/arm: " Richard Henderson
2021-10-16 18:14 ` [PULL 07/24] target/hppa: " Richard Henderson
2021-10-16 18:14 ` [PULL 08/24] target/i386: Check CF_NO_GOTO_TB for dc->jmp_opt Richard Henderson
2021-10-16 18:14 ` [PULL 09/24] target/i386: Drop check for singlestep_enabled Richard Henderson
2021-10-16 18:15 ` Richard Henderson [this message]
2021-10-16 18:15 ` [PULL 11/24] target/microblaze: Check CF_NO_GOTO_TB for DISAS_JUMP Richard Henderson
2021-10-16 18:15 ` [PULL 12/24] target/microblaze: Drop checks for singlestep_enabled Richard Henderson
2021-10-16 18:15 ` [PULL 13/24] target/mips: Fix single stepping Richard Henderson
2021-10-16 18:15 ` [PULL 14/24] target/mips: Drop exit checks for singlestep_enabled Richard Henderson
2021-10-16 18:15 ` [PULL 15/24] target/openrisc: Drop " Richard Henderson
2021-10-16 18:15 ` [PULL 16/24] target/ppc: Drop exit " Richard Henderson
2021-10-16 18:15 ` [PULL 17/24] target/riscv: Remove dead code after exception Richard Henderson
2021-10-16 18:15 ` [PULL 18/24] target/riscv: Remove exit_tb and lookup_and_goto_ptr Richard Henderson
2021-10-16 18:15 ` [PULL 19/24] target/rx: Drop checks for singlestep_enabled Richard Henderson
2021-10-16 18:15 ` [PULL 20/24] target/s390x: Drop check " Richard Henderson
2021-10-16 18:15 ` [PULL 21/24] target/sh4: " Richard Henderson
2021-10-16 18:15 ` [PULL 22/24] target/tricore: " Richard Henderson
2021-10-16 18:15 ` [PULL 23/24] target/xtensa: " Richard Henderson
2021-10-16 18:15 ` [PULL 24/24] Revert "cpu: Move cpu_common_props to hw/core/cpu.c" Richard Henderson
2021-10-16 23:49 ` [PULL 00/24] tcg patch queue Richard Henderson
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