From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-devel@nongnu.org
Cc: fam@euphon.net, minyihh@uci.edu, berrange@redhat.com,
kuhn.chenqun@huawei.com, "Riku Voipio" <riku.voipio@iki.fi>,
"Richard Henderson" <richard.henderson@linaro.org>,
f4bug@amsat.org, robhenry@microsoft.com,
"Luis Vilanova" <vilanova@imperial.ac.uk>,
mahmoudabdalghany@outlook.com, aaron@os.amperecomputing.com,
cota@braap.org, stefanha@redhat.com, crosa@redhat.com,
pbonzini@redhat.com, ma.mandourr@gmail.com,
"Alex Bennée" <alex.bennee@linaro.org>,
aurelien@aurel32.net
Subject: [PATCH v1 22/28] tracing: remove TCG memory access tracing
Date: Tue, 26 Oct 2021 11:22:28 +0100 [thread overview]
Message-ID: <20211026102234.3961636-23-alex.bennee@linaro.org> (raw)
In-Reply-To: <20211026102234.3961636-1-alex.bennee@linaro.org>
If you really want to trace all memory operations TCG plugins gives
you a more flexible interface for doing so.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Luis Vilanova <vilanova@imperial.ac.uk>
Cc: Stefan Hajnoczi <stefanha@redhat.com>
---
accel/tcg/atomic_template.h | 12 ------------
accel/tcg/cputlb.c | 2 --
accel/tcg/user-exec.c | 15 +--------------
tcg/tcg-op.c | 5 -----
accel/tcg/atomic_common.c.inc | 20 --------------------
trace-events | 14 --------------
6 files changed, 1 insertion(+), 67 deletions(-)
diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
index 2d917b6b1f..fc165031e8 100644
--- a/accel/tcg/atomic_template.h
+++ b/accel/tcg/atomic_template.h
@@ -77,7 +77,6 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr,
PAGE_READ | PAGE_WRITE, retaddr);
DATA_TYPE ret;
- atomic_trace_rmw_pre(env, addr, oi);
#if DATA_SIZE == 16
ret = atomic16_cmpxchg(haddr, cmpv, newv);
#else
@@ -97,7 +96,6 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr,
PAGE_READ, retaddr);
DATA_TYPE val;
- atomic_trace_ld_pre(env, addr, oi);
val = atomic16_read(haddr);
ATOMIC_MMU_CLEANUP;
atomic_trace_ld_post(env, addr, oi);
@@ -110,7 +108,6 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr, ABI_TYPE val,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_WRITE, retaddr);
- atomic_trace_st_pre(env, addr, oi);
atomic16_set(haddr, val);
ATOMIC_MMU_CLEANUP;
atomic_trace_st_post(env, addr, oi);
@@ -124,7 +121,6 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, ABI_TYPE val,
PAGE_READ | PAGE_WRITE, retaddr);
DATA_TYPE ret;
- atomic_trace_rmw_pre(env, addr, oi);
ret = qatomic_xchg__nocheck(haddr, val);
ATOMIC_MMU_CLEANUP;
atomic_trace_rmw_post(env, addr, oi);
@@ -138,7 +134,6 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
DATA_TYPE ret; \
- atomic_trace_rmw_pre(env, addr, oi); \
ret = qatomic_##X(haddr, val); \
ATOMIC_MMU_CLEANUP; \
atomic_trace_rmw_post(env, addr, oi); \
@@ -171,7 +166,6 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
XDATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
XDATA_TYPE cmp, old, new, val = xval; \
- atomic_trace_rmw_pre(env, addr, oi); \
smp_mb(); \
cmp = qatomic_read__nocheck(haddr); \
do { \
@@ -216,7 +210,6 @@ ABI_TYPE ATOMIC_NAME(cmpxchg)(CPUArchState *env, target_ulong addr,
PAGE_READ | PAGE_WRITE, retaddr);
DATA_TYPE ret;
- atomic_trace_rmw_pre(env, addr, oi);
#if DATA_SIZE == 16
ret = atomic16_cmpxchg(haddr, BSWAP(cmpv), BSWAP(newv));
#else
@@ -236,7 +229,6 @@ ABI_TYPE ATOMIC_NAME(ld)(CPUArchState *env, target_ulong addr,
PAGE_READ, retaddr);
DATA_TYPE val;
- atomic_trace_ld_pre(env, addr, oi);
val = atomic16_read(haddr);
ATOMIC_MMU_CLEANUP;
atomic_trace_ld_post(env, addr, oi);
@@ -249,7 +241,6 @@ void ATOMIC_NAME(st)(CPUArchState *env, target_ulong addr, ABI_TYPE val,
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE,
PAGE_WRITE, retaddr);
- atomic_trace_st_pre(env, addr, oi);
val = BSWAP(val);
atomic16_set(haddr, val);
ATOMIC_MMU_CLEANUP;
@@ -264,7 +255,6 @@ ABI_TYPE ATOMIC_NAME(xchg)(CPUArchState *env, target_ulong addr, ABI_TYPE val,
PAGE_READ | PAGE_WRITE, retaddr);
ABI_TYPE ret;
- atomic_trace_rmw_pre(env, addr, oi);
ret = qatomic_xchg__nocheck(haddr, BSWAP(val));
ATOMIC_MMU_CLEANUP;
atomic_trace_rmw_post(env, addr, oi);
@@ -278,7 +268,6 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
DATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
DATA_TYPE ret; \
- atomic_trace_rmw_pre(env, addr, oi); \
ret = qatomic_##X(haddr, BSWAP(val)); \
ATOMIC_MMU_CLEANUP; \
atomic_trace_rmw_post(env, addr, oi); \
@@ -308,7 +297,6 @@ ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
XDATA_TYPE *haddr = atomic_mmu_lookup(env, addr, oi, DATA_SIZE, \
PAGE_READ | PAGE_WRITE, retaddr); \
XDATA_TYPE ldo, ldn, old, new, val = xval; \
- atomic_trace_rmw_pre(env, addr, oi); \
smp_mb(); \
ldn = qatomic_read__nocheck(haddr); \
do { \
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index b69a953447..6899e4fe72 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -2140,7 +2140,6 @@ static inline uint64_t cpu_load_helper(CPUArchState *env, abi_ptr addr,
{
uint64_t ret;
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
ret = full_load(env, addr, oi, retaddr);
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, oi, QEMU_PLUGIN_MEM_R);
return ret;
@@ -2487,7 +2486,6 @@ static inline void cpu_store_helper(CPUArchState *env, target_ulong addr,
uint64_t val, MemOpIdx oi, uintptr_t ra,
FullStoreHelper *full_store)
{
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
full_store(env, addr, val, oi, ra);
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, oi, QEMU_PLUGIN_MEM_W);
}
diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c
index e6bb29b42d..7e10634580 100644
--- a/accel/tcg/user-exec.c
+++ b/accel/tcg/user-exec.c
@@ -920,7 +920,6 @@ uint8_t cpu_ldb_mmu(CPUArchState *env, abi_ptr addr,
uint8_t ret;
validate_memop(oi, MO_UB);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = ldub_p(haddr);
clear_helper_retaddr();
@@ -935,7 +934,6 @@ uint16_t cpu_ldw_be_mmu(CPUArchState *env, abi_ptr addr,
uint16_t ret;
validate_memop(oi, MO_BEUW);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = lduw_be_p(haddr);
clear_helper_retaddr();
@@ -950,7 +948,6 @@ uint32_t cpu_ldl_be_mmu(CPUArchState *env, abi_ptr addr,
uint32_t ret;
validate_memop(oi, MO_BEUL);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = ldl_be_p(haddr);
clear_helper_retaddr();
@@ -965,7 +962,7 @@ uint64_t cpu_ldq_be_mmu(CPUArchState *env, abi_ptr addr,
uint64_t ret;
validate_memop(oi, MO_BEQ);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
+
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = ldq_be_p(haddr);
clear_helper_retaddr();
@@ -980,7 +977,6 @@ uint16_t cpu_ldw_le_mmu(CPUArchState *env, abi_ptr addr,
uint16_t ret;
validate_memop(oi, MO_LEUW);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = lduw_le_p(haddr);
clear_helper_retaddr();
@@ -995,7 +991,6 @@ uint32_t cpu_ldl_le_mmu(CPUArchState *env, abi_ptr addr,
uint32_t ret;
validate_memop(oi, MO_LEUL);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = ldl_le_p(haddr);
clear_helper_retaddr();
@@ -1010,7 +1005,6 @@ uint64_t cpu_ldq_le_mmu(CPUArchState *env, abi_ptr addr,
uint64_t ret;
validate_memop(oi, MO_LEQ);
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_LOAD);
ret = ldq_le_p(haddr);
clear_helper_retaddr();
@@ -1024,7 +1018,6 @@ void cpu_stb_mmu(CPUArchState *env, abi_ptr addr, uint8_t val,
void *haddr;
validate_memop(oi, MO_UB);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stb_p(haddr, val);
clear_helper_retaddr();
@@ -1037,7 +1030,6 @@ void cpu_stw_be_mmu(CPUArchState *env, abi_ptr addr, uint16_t val,
void *haddr;
validate_memop(oi, MO_BEUW);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stw_be_p(haddr, val);
clear_helper_retaddr();
@@ -1050,7 +1042,6 @@ void cpu_stl_be_mmu(CPUArchState *env, abi_ptr addr, uint32_t val,
void *haddr;
validate_memop(oi, MO_BEUL);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stl_be_p(haddr, val);
clear_helper_retaddr();
@@ -1063,7 +1054,6 @@ void cpu_stq_be_mmu(CPUArchState *env, abi_ptr addr, uint64_t val,
void *haddr;
validate_memop(oi, MO_BEQ);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stq_be_p(haddr, val);
clear_helper_retaddr();
@@ -1076,7 +1066,6 @@ void cpu_stw_le_mmu(CPUArchState *env, abi_ptr addr, uint16_t val,
void *haddr;
validate_memop(oi, MO_LEUW);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stw_le_p(haddr, val);
clear_helper_retaddr();
@@ -1089,7 +1078,6 @@ void cpu_stl_le_mmu(CPUArchState *env, abi_ptr addr, uint32_t val,
void *haddr;
validate_memop(oi, MO_LEUL);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stl_le_p(haddr, val);
clear_helper_retaddr();
@@ -1102,7 +1090,6 @@ void cpu_stq_le_mmu(CPUArchState *env, abi_ptr addr, uint64_t val,
void *haddr;
validate_memop(oi, MO_LEQ);
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
haddr = cpu_mmu_lookup(env, addr, oi, ra, MMU_DATA_STORE);
stq_le_p(haddr, val);
clear_helper_retaddr();
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index 61b492d89f..65e1c94c2d 100644
--- a/tcg/tcg-op.c
+++ b/tcg/tcg-op.c
@@ -27,7 +27,6 @@
#include "tcg/tcg.h"
#include "tcg/tcg-op.h"
#include "tcg/tcg-mo.h"
-#include "trace-tcg.h"
#include "exec/plugin-gen.h"
/* Reduce the number of ifdefs below. This assumes that all uses of
@@ -2877,7 +2876,6 @@ void tcg_gen_qemu_ld_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
memop = tcg_canonicalize_memop(memop, 0, 0);
oi = make_memop_idx(memop, idx);
- trace_guest_ld_before_tcg(tcg_ctx->cpu, cpu_env, addr, oi);
orig_memop = memop;
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
@@ -2916,7 +2914,6 @@ void tcg_gen_qemu_st_i32(TCGv_i32 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
memop = tcg_canonicalize_memop(memop, 0, 1);
oi = make_memop_idx(memop, idx);
- trace_guest_st_before_tcg(tcg_ctx->cpu, cpu_env, addr, oi);
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
swap = tcg_temp_new_i32();
@@ -2965,7 +2962,6 @@ void tcg_gen_qemu_ld_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_LD | TCG_MO_ST_LD);
memop = tcg_canonicalize_memop(memop, 1, 0);
oi = make_memop_idx(memop, idx);
- trace_guest_ld_before_tcg(tcg_ctx->cpu, cpu_env, addr, oi);
orig_memop = memop;
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
@@ -3013,7 +3009,6 @@ void tcg_gen_qemu_st_i64(TCGv_i64 val, TCGv addr, TCGArg idx, MemOp memop)
tcg_gen_req_mo(TCG_MO_LD_ST | TCG_MO_ST_ST);
memop = tcg_canonicalize_memop(memop, 1, 1);
oi = make_memop_idx(memop, idx);
- trace_guest_st_before_tcg(tcg_ctx->cpu, cpu_env, addr, oi);
if (!TCG_TARGET_HAS_MEMORY_BSWAP && (memop & MO_BSWAP)) {
swap = tcg_temp_new_i64();
diff --git a/accel/tcg/atomic_common.c.inc b/accel/tcg/atomic_common.c.inc
index 1df1f243e9..6602d7689f 100644
--- a/accel/tcg/atomic_common.c.inc
+++ b/accel/tcg/atomic_common.c.inc
@@ -13,14 +13,6 @@
* See the COPYING file in the top-level directory.
*/
-static void atomic_trace_rmw_pre(CPUArchState *env, target_ulong addr,
- MemOpIdx oi)
-{
- CPUState *cpu = env_cpu(env);
-
- trace_guest_rmw_before_exec(cpu, addr, oi);
-}
-
static void atomic_trace_rmw_post(CPUArchState *env, target_ulong addr,
MemOpIdx oi)
{
@@ -28,24 +20,12 @@ static void atomic_trace_rmw_post(CPUArchState *env, target_ulong addr,
}
#if HAVE_ATOMIC128
-static void atomic_trace_ld_pre(CPUArchState *env, target_ulong addr,
- MemOpIdx oi)
-{
- trace_guest_ld_before_exec(env_cpu(env), addr, oi);
-}
-
static void atomic_trace_ld_post(CPUArchState *env, target_ulong addr,
MemOpIdx oi)
{
qemu_plugin_vcpu_mem_cb(env_cpu(env), addr, oi, QEMU_PLUGIN_MEM_R);
}
-static void atomic_trace_st_pre(CPUArchState *env, target_ulong addr,
- MemOpIdx oi)
-{
- trace_guest_st_before_exec(env_cpu(env), addr, oi);
-}
-
static void atomic_trace_st_post(CPUArchState *env, target_ulong addr,
MemOpIdx oi)
{
diff --git a/trace-events b/trace-events
index a637a61eba..bc71006675 100644
--- a/trace-events
+++ b/trace-events
@@ -117,20 +117,6 @@ vcpu guest_cpu_exit(void)
# Targets: all
vcpu guest_cpu_reset(void)
-# tcg/tcg-op.c
-
-# @vaddr: Access' virtual address.
-# @memopidx: Access' information (see below).
-#
-# Start virtual memory access (before any potential access violation).
-# Does not include memory accesses performed by devices.
-#
-# Mode: user, softmmu
-# Targets: TCG(all)
-vcpu tcg guest_ld_before(TCGv vaddr, uint32_t memopidx) "info=%d", "vaddr=0x%016"PRIx64" memopidx=0x%x"
-vcpu tcg guest_st_before(TCGv vaddr, uint32_t memopidx) "info=%d", "vaddr=0x%016"PRIx64" memopidx=0x%x"
-vcpu tcg guest_rmw_before(TCGv vaddr, uint32_t memopidx) "info=%d", "vaddr=0x%016"PRIx64" memopidx=0x%x"
-
# include/user/syscall-trace.h
# @num: System call number.
--
2.30.2
next prev parent reply other threads:[~2021-10-26 10:56 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-26 10:22 [PATCH v1 00/28] testing, plugins and gdbstub for 6.2 Alex Bennée
2021-10-26 10:22 ` [PATCH v1 01/28] tests/docker: Use apt build-dep in debian10 Alex Bennée
2021-10-26 10:22 ` [PATCH v1 02/28] tests/docker: Simplify debian-all-test-cross Alex Bennée
2021-10-26 10:22 ` [PATCH v1 03/28] tests/docker: Update debian-hexagon-cross to a newer toolchain Alex Bennée
2021-10-26 14:58 ` Philippe Mathieu-Daudé
2021-10-26 14:59 ` Philippe Mathieu-Daudé
2021-10-26 10:22 ` [PATCH v1 04/28] gitlab-ci: Remove special casing for hexagon testing Alex Bennée
2021-10-26 15:00 ` Philippe Mathieu-Daudé
2021-10-26 20:46 ` Willian Rampazzo
2021-10-26 10:22 ` [PATCH v1 05/28] tests/docker: Add debian-nios2-cross image Alex Bennée
2021-10-26 15:01 ` Philippe Mathieu-Daudé
2021-10-26 20:49 ` Willian Rampazzo
2021-10-26 10:22 ` [PATCH v1 06/28] tests/docker: Add debian-microblaze-cross image Alex Bennée
2021-10-26 15:02 ` Philippe Mathieu-Daudé
2021-10-26 20:50 ` Willian Rampazzo
2021-10-26 10:22 ` [PATCH v1 07/28] tests/tcg: Enable container_cross_cc for microblaze Alex Bennée
2021-10-26 15:03 ` Philippe Mathieu-Daudé
2021-10-26 10:22 ` [PATCH v1 08/28] tests/tcg: Fix some targets default cross compiler path Alex Bennée
2021-10-26 10:41 ` Philippe Mathieu-Daudé
2021-10-26 10:22 ` [PATCH v1 09/28] tests/docker: split PARTIAL into PARTIAL and VIRTUAL images Alex Bennée
2021-10-26 20:01 ` Richard Henderson
2021-10-26 20:52 ` Willian Rampazzo
2021-10-26 10:22 ` [PATCH v1 10/28] tests/docker: allow non-unique userid Alex Bennée
2021-10-26 20:42 ` Richard Henderson
2021-11-01 15:10 ` Alex Bennée
2021-10-26 10:22 ` [PATCH v1 11/28] tests/tcg: enable debian-nios2-cross for test building Alex Bennée
2021-10-26 15:04 ` Philippe Mathieu-Daudé
2021-10-26 20:02 ` Richard Henderson
2021-10-26 10:22 ` [PATCH v1 12/28] ebpf: really include it only in system emulators Alex Bennée
2021-10-26 20:03 ` Richard Henderson
2021-10-27 16:10 ` Warner Losh
2021-10-26 10:22 ` [PATCH v1 13/28] plugins/cache: freed heap-allocated mutexes Alex Bennée
2021-10-26 15:06 ` Philippe Mathieu-Daudé
2021-10-26 10:22 ` [PATCH v1 14/28] plugins/cache: implement unified L2 cache emulation Alex Bennée
2021-10-26 10:22 ` [PATCH v1 15/28] plugins/cache: split command line arguments into name and value Alex Bennée
2021-10-26 10:22 ` [PATCH v1 16/28] plugins/cache: make L2 emulation optional through args Alex Bennée
2021-10-26 10:22 ` [PATCH v1 17/28] docs/tcg-plugins: add L2 arguments to cache docs Alex Bennée
2021-10-26 10:22 ` [PATCH v1 18/28] chardev: don't exit() straight away on C-a x Alex Bennée
2021-10-26 10:22 ` [PATCH v1 19/28] tests/plugins: extend the insn plugin to track opcode sizes Alex Bennée
2021-10-26 10:22 ` [PATCH v1 20/28] plugins: try and make plugin_insn_append more ergonomic Alex Bennée
2021-10-26 20:09 ` Richard Henderson
2021-10-26 10:22 ` [PATCH v1 21/28] docs: remove references to TCG tracing Alex Bennée
2021-10-26 20:10 ` Richard Henderson
2021-10-26 10:22 ` Alex Bennée [this message]
2021-10-26 20:15 ` [PATCH v1 22/28] tracing: remove TCG memory access tracing Richard Henderson
2021-10-26 10:22 ` [PATCH v1 23/28] tracing: remove the trace-tcg includes from the build Alex Bennée
2021-10-26 20:20 ` Richard Henderson
2021-10-26 10:22 ` [PATCH v1 24/28] tracing: excise the tcg related from tracetool Alex Bennée
2021-10-26 20:23 ` Richard Henderson
2021-10-26 10:22 ` [PATCH v1 25/28] plugins: add helper functions for coverage plugins Alex Bennée
2021-10-26 20:25 ` Richard Henderson
2021-10-27 16:09 ` Warner Losh
2021-10-27 18:58 ` Richard Henderson
2021-10-28 17:09 ` Warner Losh
2021-10-26 10:22 ` [PATCH v1 26/28] contrib/plugins: add a drcov plugin Alex Bennée
2021-10-26 10:22 ` [PATCH v1 27/28] tests/tcg: remove duplicate EXTRA_RUNS Alex Bennée
2021-10-26 15:11 ` Philippe Mathieu-Daudé
2021-10-26 20:27 ` Richard Henderson
2021-10-27 14:48 ` Alex Bennée
2021-10-26 10:22 ` [PATCH v1 28/28] gdbstub: Switch to the thread receiving a signal Alex Bennée
2021-10-26 20:34 ` Richard Henderson
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