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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Luis Pires <luis.pires@eldorado.org.br>
Subject: [PULL v2 02/60] host-utils: move checks out of divu128/divs128
Date: Thu, 28 Oct 2021 21:32:31 -0700	[thread overview]
Message-ID: <20211029043329.1518029-3-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211029043329.1518029-1-richard.henderson@linaro.org>

From: Luis Pires <luis.pires@eldorado.org.br>

In preparation for changing the divu128/divs128 implementations
to allow for quotients larger than 64 bits, move the div-by-zero
and overflow checks to the callers.

Signed-off-by: Luis Pires <luis.pires@eldorado.org.br>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20211025191154.350831-2-luis.pires@eldorado.org.br>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 include/hw/clock.h        |  5 +++--
 include/qemu/host-utils.h | 34 ++++++++++++---------------------
 target/ppc/int_helper.c   | 14 +++++++++-----
 util/host-utils.c         | 40 ++++++++++++++++++---------------------
 4 files changed, 42 insertions(+), 51 deletions(-)

diff --git a/include/hw/clock.h b/include/hw/clock.h
index 11f67fb970..7443e6c4ab 100644
--- a/include/hw/clock.h
+++ b/include/hw/clock.h
@@ -324,8 +324,9 @@ static inline uint64_t clock_ns_to_ticks(const Clock *clk, uint64_t ns)
         return 0;
     }
     /*
-     * Ignore divu128() return value as we've caught div-by-zero and don't
-     * need different behaviour for overflow.
+     * BUG: when CONFIG_INT128 is not defined, the current implementation of
+     * divu128 does not return a valid truncated quotient, so the result will
+     * be wrong.
      */
     divu128(&lo, &hi, clk->period);
     return lo;
diff --git a/include/qemu/host-utils.h b/include/qemu/host-utils.h
index ca9f3f021b..e82e6239af 100644
--- a/include/qemu/host-utils.h
+++ b/include/qemu/host-utils.h
@@ -52,36 +52,26 @@ static inline uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c)
     return (__int128_t)a * b / c;
 }
 
-static inline int divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
+static inline void divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
 {
-    if (divisor == 0) {
-        return 1;
-    } else {
-        __uint128_t dividend = ((__uint128_t)*phigh << 64) | *plow;
-        __uint128_t result = dividend / divisor;
-        *plow = result;
-        *phigh = dividend % divisor;
-        return result > UINT64_MAX;
-    }
+    __uint128_t dividend = ((__uint128_t)*phigh << 64) | *plow;
+    __uint128_t result = dividend / divisor;
+    *plow = result;
+    *phigh = dividend % divisor;
 }
 
-static inline int divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
+static inline void divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
 {
-    if (divisor == 0) {
-        return 1;
-    } else {
-        __int128_t dividend = ((__int128_t)*phigh << 64) | (uint64_t)*plow;
-        __int128_t result = dividend / divisor;
-        *plow = result;
-        *phigh = dividend % divisor;
-        return result != *plow;
-    }
+    __int128_t dividend = ((__int128_t)*phigh << 64) | (uint64_t)*plow;
+    __int128_t result = dividend / divisor;
+    *plow = result;
+    *phigh = dividend % divisor;
 }
 #else
 void muls64(uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b);
 void mulu64(uint64_t *plow, uint64_t *phigh, uint64_t a, uint64_t b);
-int divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor);
-int divs128(int64_t *plow, int64_t *phigh, int64_t divisor);
+void divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor);
+void divs128(int64_t *plow, int64_t *phigh, int64_t divisor);
 
 static inline uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c)
 {
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index f5dac3aa87..510faf24cf 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -104,10 +104,11 @@ uint64_t helper_divdeu(CPUPPCState *env, uint64_t ra, uint64_t rb, uint32_t oe)
     uint64_t rt = 0;
     int overflow = 0;
 
-    overflow = divu128(&rt, &ra, rb);
-
-    if (unlikely(overflow)) {
+    if (unlikely(rb == 0 || ra >= rb)) {
+        overflow = 1;
         rt = 0; /* Undefined */
+    } else {
+        divu128(&rt, &ra, rb);
     }
 
     if (oe) {
@@ -122,10 +123,13 @@ uint64_t helper_divde(CPUPPCState *env, uint64_t rau, uint64_t rbu, uint32_t oe)
     int64_t rt = 0;
     int64_t ra = (int64_t)rau;
     int64_t rb = (int64_t)rbu;
-    int overflow = divs128(&rt, &ra, rb);
+    int overflow = 0;
 
-    if (unlikely(overflow)) {
+    if (unlikely(rb == 0 || uabs64(ra) >= uabs64(rb))) {
+        overflow = 1;
         rt = 0; /* Undefined */
+    } else {
+        divs128(&rt, &ra, rb);
     }
 
     if (oe) {
diff --git a/util/host-utils.c b/util/host-utils.c
index a789a11b46..701a371843 100644
--- a/util/host-utils.c
+++ b/util/host-utils.c
@@ -86,24 +86,23 @@ void muls64 (uint64_t *plow, uint64_t *phigh, int64_t a, int64_t b)
     *phigh = rh;
 }
 
-/* Unsigned 128x64 division.  Returns 1 if overflow (divide by zero or */
-/* quotient exceeds 64 bits).  Otherwise returns quotient via plow and */
-/* remainder via phigh. */
-int divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
+/*
+ * Unsigned 128-by-64 division. Returns quotient via plow and
+ * remainder via phigh.
+ * The result must fit in 64 bits (plow) - otherwise, the result
+ * is undefined.
+ * This function will cause a division by zero if passed a zero divisor.
+ */
+void divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
 {
     uint64_t dhi = *phigh;
     uint64_t dlo = *plow;
     unsigned i;
     uint64_t carry = 0;
 
-    if (divisor == 0) {
-        return 1;
-    } else if (dhi == 0) {
+    if (divisor == 0 || dhi == 0) {
         *plow  = dlo / divisor;
         *phigh = dlo % divisor;
-        return 0;
-    } else if (dhi >= divisor) {
-        return 1;
     } else {
 
         for (i = 0; i < 64; i++) {
@@ -120,15 +119,20 @@ int divu128(uint64_t *plow, uint64_t *phigh, uint64_t divisor)
 
         *plow = dlo;
         *phigh = dhi;
-        return 0;
     }
 }
 
-int divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
+/*
+ * Signed 128-by-64 division. Returns quotient via plow and
+ * remainder via phigh.
+ * The result must fit in 64 bits (plow) - otherwise, the result
+ * is undefined.
+ * This function will cause a division by zero if passed a zero divisor.
+ */
+void divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
 {
     int sgn_dvdnd = *phigh < 0;
     int sgn_divsr = divisor < 0;
-    int overflow = 0;
 
     if (sgn_dvdnd) {
         *plow = ~(*plow);
@@ -145,19 +149,11 @@ int divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
         divisor = 0 - divisor;
     }
 
-    overflow = divu128((uint64_t *)plow, (uint64_t *)phigh, (uint64_t)divisor);
+    divu128((uint64_t *)plow, (uint64_t *)phigh, (uint64_t)divisor);
 
     if (sgn_dvdnd  ^ sgn_divsr) {
         *plow = 0 - *plow;
     }
-
-    if (!overflow) {
-        if ((*plow < 0) ^ (sgn_dvdnd ^ sgn_divsr)) {
-            overflow = 1;
-        }
-    }
-
-    return overflow;
 }
 #endif
 
-- 
2.25.1



  parent reply	other threads:[~2021-10-29  4:34 UTC|newest]

Thread overview: 64+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-29  4:32 [PULL v2 00/60] tcg patch queue Richard Henderson
2021-10-29  4:32 ` [PULL v2 01/60] qemu/int128: Add int128_{not,xor} Richard Henderson
2021-10-29  4:32 ` Richard Henderson [this message]
2021-10-29  4:32 ` [PULL v2 03/60] host-utils: move udiv_qrnnd() to host-utils Richard Henderson
2021-10-29  4:32 ` [PULL v2 04/60] host-utils: add 128-bit quotient support to divu128/divs128 Richard Henderson
2021-10-29  4:32 ` [PULL v2 05/60] host-utils: add unit tests for divu128/divs128 Richard Henderson
2021-10-29  4:32 ` [PULL v2 06/60] tcg/optimize: Rename "mask" to "z_mask" Richard Henderson
2021-10-29  4:32 ` [PULL v2 07/60] tcg/optimize: Split out OptContext Richard Henderson
2021-10-29  4:32 ` [PULL v2 08/60] tcg/optimize: Remove do_default label Richard Henderson
2021-10-29  4:32 ` [PULL v2 09/60] tcg/optimize: Change tcg_opt_gen_{mov, movi} interface Richard Henderson
2021-10-29  4:32 ` [PULL v2 10/60] tcg/optimize: Move prev_mb into OptContext Richard Henderson
2021-10-29  4:32 ` [PULL v2 11/60] tcg/optimize: Split out init_arguments Richard Henderson
2021-10-29  4:32 ` [PULL v2 12/60] tcg/optimize: Split out copy_propagate Richard Henderson
2021-10-29  4:32 ` [PULL v2 13/60] tcg/optimize: Split out fold_call Richard Henderson
2021-10-29  4:32 ` [PULL v2 14/60] tcg/optimize: Drop nb_oargs, nb_iargs locals Richard Henderson
2021-10-29  4:32 ` [PULL v2 15/60] tcg/optimize: Change fail return for do_constant_folding_cond* Richard Henderson
2021-10-29  4:32 ` [PULL v2 16/60] tcg/optimize: Return true from tcg_opt_gen_{mov, movi} Richard Henderson
2021-10-29  4:32 ` [PULL v2 17/60] tcg/optimize: Split out finish_folding Richard Henderson
2021-10-29  4:32 ` [PULL v2 18/60] tcg/optimize: Use a boolean to avoid a mass of continues Richard Henderson
2021-10-29  4:32 ` [PULL v2 19/60] tcg/optimize: Split out fold_mb, fold_qemu_{ld,st} Richard Henderson
2021-10-29  4:32 ` [PULL v2 20/60] tcg/optimize: Split out fold_const{1,2} Richard Henderson
2021-10-29  4:32 ` [PULL v2 21/60] tcg/optimize: Split out fold_setcond2 Richard Henderson
2021-10-29  4:32 ` [PULL v2 22/60] tcg/optimize: Split out fold_brcond2 Richard Henderson
2021-10-29  4:32 ` [PULL v2 23/60] tcg/optimize: Split out fold_brcond Richard Henderson
2021-10-29  4:32 ` [PULL v2 24/60] tcg/optimize: Split out fold_setcond Richard Henderson
2021-10-29  4:32 ` [PULL v2 25/60] tcg/optimize: Split out fold_mulu2_i32 Richard Henderson
2021-10-29  4:32 ` [PULL v2 26/60] tcg/optimize: Split out fold_addsub2_i32 Richard Henderson
2021-10-29  4:32 ` [PULL v2 27/60] tcg/optimize: Split out fold_movcond Richard Henderson
2021-10-29  4:32 ` [PULL v2 28/60] tcg/optimize: Split out fold_extract2 Richard Henderson
2021-11-09 16:52   ` Peter Maydell
2021-11-09 17:22     ` Richard Henderson
2021-10-29  4:32 ` [PULL v2 29/60] tcg/optimize: Split out fold_extract, fold_sextract Richard Henderson
2021-10-29  4:32 ` [PULL v2 30/60] tcg/optimize: Split out fold_deposit Richard Henderson
2021-10-29  4:33 ` [PULL v2 31/60] tcg/optimize: Split out fold_count_zeros Richard Henderson
2021-10-29  4:33 ` [PULL v2 32/60] tcg/optimize: Split out fold_bswap Richard Henderson
2021-10-29  4:33 ` [PULL v2 33/60] tcg/optimize: Split out fold_dup, fold_dup2 Richard Henderson
2021-10-29  4:33 ` [PULL v2 34/60] tcg/optimize: Split out fold_mov Richard Henderson
2021-10-29  4:33 ` [PULL v2 35/60] tcg/optimize: Split out fold_xx_to_i Richard Henderson
2021-10-29  4:33 ` [PULL v2 36/60] tcg/optimize: Split out fold_xx_to_x Richard Henderson
2021-10-29  4:33 ` [PULL v2 37/60] tcg/optimize: Split out fold_xi_to_i Richard Henderson
2021-10-29  4:33 ` [PULL v2 38/60] tcg/optimize: Add type to OptContext Richard Henderson
2021-10-29  4:33 ` [PULL v2 39/60] tcg/optimize: Split out fold_to_not Richard Henderson
2021-10-29  4:33 ` [PULL v2 40/60] tcg/optimize: Split out fold_sub_to_neg Richard Henderson
2021-10-29  4:33 ` [PULL v2 41/60] tcg/optimize: Split out fold_xi_to_x Richard Henderson
2021-10-29  4:33 ` [PULL v2 42/60] tcg/optimize: Split out fold_ix_to_i Richard Henderson
2021-10-29  4:33 ` [PULL v2 43/60] tcg/optimize: Split out fold_masks Richard Henderson
2021-10-29  4:33 ` [PULL v2 44/60] tcg/optimize: Expand fold_mulu2_i32 to all 4-arg multiplies Richard Henderson
2021-10-29  4:33 ` [PULL v2 45/60] tcg/optimize: Expand fold_addsub2_i32 to 64-bit ops Richard Henderson
2021-10-29  4:33 ` [PULL v2 46/60] tcg/optimize: Sink commutative operand swapping into fold functions Richard Henderson
2021-10-29  4:33 ` [PULL v2 47/60] tcg: Extend call args using the correct opcodes Richard Henderson
2021-10-29  4:33 ` [PULL v2 48/60] tcg/optimize: Stop forcing z_mask to "garbage" for 32-bit values Richard Henderson
2021-10-29  4:33 ` [PULL v2 49/60] tcg/optimize: Use fold_xx_to_i for orc Richard Henderson
2021-10-29  4:33 ` [PULL v2 50/60] tcg/optimize: Use fold_xi_to_x for mul Richard Henderson
2021-10-29  4:33 ` [PULL v2 51/60] tcg/optimize: Use fold_xi_to_x for div Richard Henderson
2021-10-29  4:33 ` [PULL v2 52/60] tcg/optimize: Use fold_xx_to_i for rem Richard Henderson
2021-10-29  4:33 ` [PULL v2 53/60] tcg/optimize: Optimize sign extensions Richard Henderson
2021-10-29  4:33 ` [PULL v2 54/60] tcg/optimize: Propagate sign info for logical operations Richard Henderson
2021-10-29  4:33 ` [PULL v2 55/60] tcg/optimize: Propagate sign info for setcond Richard Henderson
2021-10-29  4:33 ` [PULL v2 56/60] tcg/optimize: Propagate sign info for bit counting Richard Henderson
2021-10-29  4:33 ` [PULL v2 57/60] tcg/optimize: Propagate sign info for shifting Richard Henderson
2021-10-29  4:33 ` [PULL v2 58/60] softmmu: fix watchpoint processing in icount mode Richard Henderson
2021-10-29  4:33 ` [PULL v2 59/60] softmmu: remove useless condition in watchpoint check Richard Henderson
2021-10-29  4:33 ` [PULL v2 60/60] softmmu: fix for "after access" watchpoints Richard Henderson
2021-10-29 17:58 ` [PULL v2 00/60] tcg patch queue Richard Henderson

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