qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v7 24/60] target/cris: Make cris_cpu_tlb_fill sysemu only
Date: Mon,  1 Nov 2021 13:26:53 -0400	[thread overview]
Message-ID: <20211101172729.23149-25-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211101172729.23149-1-richard.henderson@linaro.org>

The fallback code in cpu_loop_exit_sigsegv is sufficient
for cris linux-user.

Remove the code from cpu_loop that handled the unnamed 0xaa exception.
This makes all of the code in helper.c sysemu only, so remove the
ifdefs and move the file to cris_softmmu_ss.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/cris/cpu.h          |  8 ++++----
 linux-user/cris/cpu_loop.c | 10 ----------
 target/cris/cpu.c          |  4 ++--
 target/cris/helper.c       | 18 ------------------
 target/cris/meson.build    |  7 +++++--
 5 files changed, 11 insertions(+), 36 deletions(-)

diff --git a/target/cris/cpu.h b/target/cris/cpu.h
index 6603565f83..b445b194ea 100644
--- a/target/cris/cpu.h
+++ b/target/cris/cpu.h
@@ -189,6 +189,10 @@ extern const VMStateDescription vmstate_cris_cpu;
 void cris_cpu_do_interrupt(CPUState *cpu);
 void crisv10_cpu_do_interrupt(CPUState *cpu);
 bool cris_cpu_exec_interrupt(CPUState *cpu, int int_req);
+
+bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                       MMUAccessType access_type, int mmu_idx,
+                       bool probe, uintptr_t retaddr);
 #endif
 
 void cris_cpu_dump_state(CPUState *cs, FILE *f, int flags);
@@ -251,10 +255,6 @@ static inline int cpu_mmu_index (CPUCRISState *env, bool ifetch)
 	return !!(env->pregs[PR_CCS] & U_FLAG);
 }
 
-bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
-                       MMUAccessType access_type, int mmu_idx,
-                       bool probe, uintptr_t retaddr);
-
 /* Support function regs.  */
 #define SFR_RW_GC_CFG      0][0
 #define SFR_RW_MM_CFG      env->pregs[PR_SRS]][0
diff --git a/linux-user/cris/cpu_loop.c b/linux-user/cris/cpu_loop.c
index b9085619c4..0d5d268609 100644
--- a/linux-user/cris/cpu_loop.c
+++ b/linux-user/cris/cpu_loop.c
@@ -37,16 +37,6 @@ void cpu_loop(CPUCRISState *env)
         process_queued_cpu_work(cs);
 
         switch (trapnr) {
-        case 0xaa:
-            {
-                info.si_signo = TARGET_SIGSEGV;
-                info.si_errno = 0;
-                /* XXX: check env->error_code */
-                info.si_code = TARGET_SEGV_MAPERR;
-                info._sifields._sigfault._addr = env->pregs[PR_EDA];
-                queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
-            }
-            break;
         case EXCP_INTERRUPT:
           /* just indicate that signals should be handled asap */
           break;
diff --git a/target/cris/cpu.c b/target/cris/cpu.c
index c2e7483f5b..ed6c781342 100644
--- a/target/cris/cpu.c
+++ b/target/cris/cpu.c
@@ -205,9 +205,9 @@ static const struct SysemuCPUOps cris_sysemu_ops = {
 
 static const struct TCGCPUOps crisv10_tcg_ops = {
     .initialize = cris_initialize_crisv10_tcg,
-    .tlb_fill = cris_cpu_tlb_fill,
 
 #ifndef CONFIG_USER_ONLY
+    .tlb_fill = cris_cpu_tlb_fill,
     .cpu_exec_interrupt = cris_cpu_exec_interrupt,
     .do_interrupt = crisv10_cpu_do_interrupt,
 #endif /* !CONFIG_USER_ONLY */
@@ -215,9 +215,9 @@ static const struct TCGCPUOps crisv10_tcg_ops = {
 
 static const struct TCGCPUOps crisv32_tcg_ops = {
     .initialize = cris_initialize_tcg,
-    .tlb_fill = cris_cpu_tlb_fill,
 
 #ifndef CONFIG_USER_ONLY
+    .tlb_fill = cris_cpu_tlb_fill,
     .cpu_exec_interrupt = cris_cpu_exec_interrupt,
     .do_interrupt = cris_cpu_do_interrupt,
 #endif /* !CONFIG_USER_ONLY */
diff --git a/target/cris/helper.c b/target/cris/helper.c
index 36926faf32..a0d6ecdcd3 100644
--- a/target/cris/helper.c
+++ b/target/cris/helper.c
@@ -39,22 +39,6 @@
 #define D_LOG(...) do { } while (0)
 #endif
 
-#if defined(CONFIG_USER_ONLY)
-
-bool cris_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
-                       MMUAccessType access_type, int mmu_idx,
-                       bool probe, uintptr_t retaddr)
-{
-    CRISCPU *cpu = CRIS_CPU(cs);
-
-    cs->exception_index = 0xaa;
-    cpu->env.pregs[PR_EDA] = address;
-    cpu_loop_exit_restore(cs, retaddr);
-}
-
-#else /* !CONFIG_USER_ONLY */
-
-
 static void cris_shift_ccs(CPUCRISState *env)
 {
     uint32_t ccs;
@@ -304,5 +288,3 @@ bool cris_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
 
     return ret;
 }
-
-#endif /* !CONFIG_USER_ONLY */
diff --git a/target/cris/meson.build b/target/cris/meson.build
index 67c3793c85..c1e326d950 100644
--- a/target/cris/meson.build
+++ b/target/cris/meson.build
@@ -2,13 +2,16 @@ cris_ss = ss.source_set()
 cris_ss.add(files(
   'cpu.c',
   'gdbstub.c',
-  'helper.c',
   'op_helper.c',
   'translate.c',
 ))
 
 cris_softmmu_ss = ss.source_set()
-cris_softmmu_ss.add(files('mmu.c', 'machine.c'))
+cris_softmmu_ss.add(files(
+  'helper.c',
+  'machine.c',
+  'mmu.c',
+))
 
 target_arch += {'cris': cris_ss}
 target_softmmu_arch += {'cris': cris_softmmu_ss}
-- 
2.25.1



  parent reply	other threads:[~2021-11-01 17:56 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-01 17:26 [PATCH v7 00/60] user-only: Cleanup SIGSEGV and SIGBUS handling Richard Henderson
2021-11-01 17:26 ` [PATCH v7 01/60] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-11-01 17:26 ` [PATCH v7 02/60] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-11-01 17:26 ` [PATCH v7 03/60] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-11-01 17:26 ` [PATCH v7 04/60] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-11-01 17:26 ` [PATCH v7 05/60] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-11-01 17:26 ` [PATCH v7 06/60] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-11-01 17:26 ` [PATCH v7 07/60] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-11-01 17:26 ` [PATCH v7 08/60] linux-user/host/ppc: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 09/60] linux-user/host/alpha: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 10/60] linux-user/host/sparc: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 11/60] linux-user/host/arm: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 12/60] linux-user/host/aarch64: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 13/60] linux-user/host/s390: " Richard Henderson
2021-11-02  6:52   ` Thomas Huth
2021-11-01 17:26 ` [PATCH v7 14/60] linux-user/host/mips: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 15/60] linux-user/host/riscv: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 16/60] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-11-01 17:26 ` [PATCH v7 17/60] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-11-01 17:26 ` [PATCH v7 18/60] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-11-01 17:26 ` [PATCH v7 19/60] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 20/60] linux-user: Add cpu_loop_exit_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 21/60] target/alpha: Implement alpha_cpu_record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 22/60] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup Richard Henderson
2021-11-01 17:26 ` [PATCH v7 23/60] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-11-01 17:26 ` Richard Henderson [this message]
2021-11-01 17:26 ` [PATCH v7 25/60] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-11-01 17:26 ` [PATCH v7 26/60] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:26 ` [PATCH v7 27/60] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 28/60] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:26 ` [PATCH v7 29/60] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 30/60] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 31/60] target/nios2: Implement nios2_cpu_record_sigsegv Richard Henderson
2021-11-01 17:27 ` [PATCH v7 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-11-01 17:27 ` [PATCH v7 33/60] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 34/60] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-11-01 17:27 ` [PATCH v7 35/60] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 36/60] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 37/60] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-11-01 17:27 ` [PATCH v7 38/60] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 39/60] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 40/60] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 41/60] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-11-01 17:27 ` [PATCH v7 42/60] hw/core: Add TCGCPUOps.record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 43/60] linux-user: Add cpu_loop_exit_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 44/60] target/alpha: Implement alpha_cpu_record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 45/60] target/arm: Implement arm_cpu_record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 46/60] linux-user/hppa: Remove EXCP_UNALIGN handling Richard Henderson
2021-11-01 17:27 ` [PATCH v7 47/60] target/microblaze: Do not set MO_ALIGN for user-only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 48/60] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-11-01 17:27 ` [PATCH v7 49/60] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 50/60] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu Richard Henderson
2021-11-01 17:27 ` [PATCH v7 51/60] linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling Richard Henderson
2021-11-01 17:27 ` [PATCH v7 52/60] target/s390x: Implement s390x_cpu_record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 53/60] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 54/60] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-11-01 17:27 ` [PATCH v7 55/60] target/sparc: Split out build_sfsr Richard Henderson
2021-11-01 17:27 ` [PATCH v7 56/60] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 57/60] accel/tcg: Report unaligned atomics for user-only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 58/60] accel/tcg: Report unaligned load/store " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 59/60] tcg: Add helper_unaligned_{ld, st} for user-only sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 60/60] linux-user: Handle BUS_ADRALN in host_signal_handler Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20211101172729.23149-25-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=f4bug@amsat.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).