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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PATCH v7 44/60] target/alpha: Implement alpha_cpu_record_sigbus
Date: Mon,  1 Nov 2021 13:27:13 -0400	[thread overview]
Message-ID: <20211101172729.23149-45-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211101172729.23149-1-richard.henderson@linaro.org>

Record trap_arg{0,1,2} for the linux-user signal frame.

Raise SIGBUS directly from cpu_loop_exit_sigbus, which means
we can remove the code for EXCP_UNALIGN in cpu_loop.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/alpha/cpu.h          |  8 +++++---
 linux-user/alpha/cpu_loop.c |  7 -------
 target/alpha/cpu.c          |  1 +
 target/alpha/mem_helper.c   | 30 ++++++++++++++++++++++--------
 4 files changed, 28 insertions(+), 18 deletions(-)

diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h
index d49cc36d07..afd975c878 100644
--- a/target/alpha/cpu.h
+++ b/target/alpha/cpu.h
@@ -282,9 +282,6 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags);
 hwaddr alpha_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 int alpha_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int alpha_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                   MMUAccessType access_type, int mmu_idx,
-                                   uintptr_t retaddr) QEMU_NORETURN;
 
 #define cpu_list alpha_cpu_list
 
@@ -451,10 +448,15 @@ void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val);
 void alpha_cpu_record_sigsegv(CPUState *cs, vaddr address,
                               MMUAccessType access_type,
                               bool maperr, uintptr_t retaddr);
+void alpha_cpu_record_sigbus(CPUState *cs, vaddr address,
+                             MMUAccessType access_type, uintptr_t retaddr);
 #else
 bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                         MMUAccessType access_type, int mmu_idx,
                         bool probe, uintptr_t retaddr);
+void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                   MMUAccessType access_type, int mmu_idx,
+                                   uintptr_t retaddr) QEMU_NORETURN;
 void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
                                      vaddr addr, unsigned size,
                                      MMUAccessType access_type,
diff --git a/linux-user/alpha/cpu_loop.c b/linux-user/alpha/cpu_loop.c
index 4cc8e0a55c..4029849d5c 100644
--- a/linux-user/alpha/cpu_loop.c
+++ b/linux-user/alpha/cpu_loop.c
@@ -54,13 +54,6 @@ void cpu_loop(CPUAlphaState *env)
             fprintf(stderr, "External interrupt. Exit\n");
             exit(EXIT_FAILURE);
             break;
-        case EXCP_UNALIGN:
-            info.si_signo = TARGET_SIGBUS;
-            info.si_errno = 0;
-            info.si_code = TARGET_BUS_ADRALN;
-            info._sifields._sigfault._addr = env->trap_arg0;
-            queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info);
-            break;
         case EXCP_OPCDEC:
         do_sigill:
             info.si_signo = TARGET_SIGILL;
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 69f32c3078..a8990d401b 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -221,6 +221,7 @@ static const struct TCGCPUOps alpha_tcg_ops = {
 
 #ifdef CONFIG_USER_ONLY
     .record_sigsegv = alpha_cpu_record_sigsegv,
+    .record_sigbus = alpha_cpu_record_sigbus,
 #else
     .tlb_fill = alpha_cpu_tlb_fill,
     .cpu_exec_interrupt = alpha_cpu_exec_interrupt,
diff --git a/target/alpha/mem_helper.c b/target/alpha/mem_helper.c
index 75e72bc337..47283a0612 100644
--- a/target/alpha/mem_helper.c
+++ b/target/alpha/mem_helper.c
@@ -23,18 +23,12 @@
 #include "exec/exec-all.h"
 #include "exec/cpu_ldst.h"
 
-/* Softmmu support */
-#ifndef CONFIG_USER_ONLY
-void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
-                                   MMUAccessType access_type,
-                                   int mmu_idx, uintptr_t retaddr)
+static void do_unaligned_access(CPUAlphaState *env, vaddr addr, uintptr_t retaddr)
 {
-    AlphaCPU *cpu = ALPHA_CPU(cs);
-    CPUAlphaState *env = &cpu->env;
     uint64_t pc;
     uint32_t insn;
 
-    cpu_restore_state(cs, retaddr, true);
+    cpu_restore_state(env_cpu(env), retaddr, true);
 
     pc = env->pc;
     insn = cpu_ldl_code(env, pc);
@@ -42,6 +36,26 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     env->trap_arg0 = addr;
     env->trap_arg1 = insn >> 26;                /* opcode */
     env->trap_arg2 = (insn >> 21) & 31;         /* dest regno */
+}
+
+#ifdef CONFIG_USER_ONLY
+void alpha_cpu_record_sigbus(CPUState *cs, vaddr addr,
+                             MMUAccessType access_type, uintptr_t retaddr)
+{
+    AlphaCPU *cpu = ALPHA_CPU(cs);
+    CPUAlphaState *env = &cpu->env;
+
+    do_unaligned_access(env, addr, retaddr);
+}
+#else
+void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+                                   MMUAccessType access_type,
+                                   int mmu_idx, uintptr_t retaddr)
+{
+    AlphaCPU *cpu = ALPHA_CPU(cs);
+    CPUAlphaState *env = &cpu->env;
+
+    do_unaligned_access(env, addr, retaddr);
     cs->exception_index = EXCP_UNALIGN;
     env->error_code = 0;
     cpu_loop_exit(cs);
-- 
2.25.1



  parent reply	other threads:[~2021-11-01 18:04 UTC|newest]

Thread overview: 62+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-01 17:26 [PATCH v7 00/60] user-only: Cleanup SIGSEGV and SIGBUS handling Richard Henderson
2021-11-01 17:26 ` [PATCH v7 01/60] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-11-01 17:26 ` [PATCH v7 02/60] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-11-01 17:26 ` [PATCH v7 03/60] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-11-01 17:26 ` [PATCH v7 04/60] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-11-01 17:26 ` [PATCH v7 05/60] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-11-01 17:26 ` [PATCH v7 06/60] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-11-01 17:26 ` [PATCH v7 07/60] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-11-01 17:26 ` [PATCH v7 08/60] linux-user/host/ppc: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 09/60] linux-user/host/alpha: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 10/60] linux-user/host/sparc: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 11/60] linux-user/host/arm: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 12/60] linux-user/host/aarch64: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 13/60] linux-user/host/s390: " Richard Henderson
2021-11-02  6:52   ` Thomas Huth
2021-11-01 17:26 ` [PATCH v7 14/60] linux-user/host/mips: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 15/60] linux-user/host/riscv: " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 16/60] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-11-01 17:26 ` [PATCH v7 17/60] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-11-01 17:26 ` [PATCH v7 18/60] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-11-01 17:26 ` [PATCH v7 19/60] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 20/60] linux-user: Add cpu_loop_exit_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 21/60] target/alpha: Implement alpha_cpu_record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 22/60] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup Richard Henderson
2021-11-01 17:26 ` [PATCH v7 23/60] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 24/60] target/cris: Make cris_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:26 ` [PATCH v7 25/60] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-11-01 17:26 ` [PATCH v7 26/60] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:26 ` [PATCH v7 27/60] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-11-01 17:26 ` [PATCH v7 28/60] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:26 ` [PATCH v7 29/60] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-11-01 17:26 ` [PATCH v7 30/60] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 31/60] target/nios2: Implement nios2_cpu_record_sigsegv Richard Henderson
2021-11-01 17:27 ` [PATCH v7 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-11-01 17:27 ` [PATCH v7 33/60] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 34/60] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-11-01 17:27 ` [PATCH v7 35/60] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 36/60] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 37/60] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-11-01 17:27 ` [PATCH v7 38/60] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 39/60] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 40/60] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 41/60] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-11-01 17:27 ` [PATCH v7 42/60] hw/core: Add TCGCPUOps.record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 43/60] linux-user: Add cpu_loop_exit_sigbus Richard Henderson
2021-11-01 17:27 ` Richard Henderson [this message]
2021-11-01 17:27 ` [PATCH v7 45/60] target/arm: Implement arm_cpu_record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 46/60] linux-user/hppa: Remove EXCP_UNALIGN handling Richard Henderson
2021-11-01 17:27 ` [PATCH v7 47/60] target/microblaze: Do not set MO_ALIGN for user-only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 48/60] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-11-01 17:27 ` [PATCH v7 49/60] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 50/60] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu Richard Henderson
2021-11-01 17:27 ` [PATCH v7 51/60] linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling Richard Henderson
2021-11-01 17:27 ` [PATCH v7 52/60] target/s390x: Implement s390x_cpu_record_sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 53/60] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 54/60] target/sparc: Remove DEBUG_UNALIGNED Richard Henderson
2021-11-01 17:27 ` [PATCH v7 55/60] target/sparc: Split out build_sfsr Richard Henderson
2021-11-01 17:27 ` [PATCH v7 56/60] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-11-01 17:27 ` [PATCH v7 57/60] accel/tcg: Report unaligned atomics for user-only Richard Henderson
2021-11-01 17:27 ` [PATCH v7 58/60] accel/tcg: Report unaligned load/store " Richard Henderson
2021-11-01 17:27 ` [PATCH v7 59/60] tcg: Add helper_unaligned_{ld, st} for user-only sigbus Richard Henderson
2021-11-01 17:27 ` [PATCH v7 60/60] linux-user: Handle BUS_ADRALN in host_signal_handler Richard Henderson

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