From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: [PULL 54/60] target/sparc: Remove DEBUG_UNALIGNED
Date: Tue, 2 Nov 2021 07:07:34 -0400 [thread overview]
Message-ID: <20211102110740.215699-55-richard.henderson@linaro.org> (raw)
In-Reply-To: <20211102110740.215699-1-richard.henderson@linaro.org>
The printf should have been qemu_log_mask, the parameters
themselves no longer compile, and because this is placed
before unwinding the PC is actively wrong.
We get better (and correct) logging on the other side of
raising the exception, in sparc_cpu_do_interrupt.
Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/sparc/ldst_helper.c | 9 ---------
1 file changed, 9 deletions(-)
diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c
index bbf3601cb1..0549b6adf1 100644
--- a/target/sparc/ldst_helper.c
+++ b/target/sparc/ldst_helper.c
@@ -27,7 +27,6 @@
//#define DEBUG_MMU
//#define DEBUG_MXCC
-//#define DEBUG_UNALIGNED
//#define DEBUG_UNASSIGNED
//#define DEBUG_ASI
//#define DEBUG_CACHE_CONTROL
@@ -364,10 +363,6 @@ static void do_check_align(CPUSPARCState *env, target_ulong addr,
uint32_t align, uintptr_t ra)
{
if (addr & align) {
-#ifdef DEBUG_UNALIGNED
- printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx
- "\n", addr, env->pc);
-#endif
cpu_raise_exception_ra(env, TT_UNALIGNED, ra);
}
}
@@ -1968,10 +1963,6 @@ void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
SPARCCPU *cpu = SPARC_CPU(cs);
CPUSPARCState *env = &cpu->env;
-#ifdef DEBUG_UNALIGNED
- printf("Unaligned access to 0x" TARGET_FMT_lx " from 0x" TARGET_FMT_lx
- "\n", addr, env->pc);
-#endif
cpu_raise_exception_ra(env, TT_UNALIGNED, retaddr);
}
#endif
--
2.25.1
next prev parent reply other threads:[~2021-11-02 11:51 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-02 11:06 [PULL 00/60] accel/tcg patch queue Richard Henderson
2021-11-02 11:06 ` [PULL 01/60] accel/tcg: Split out adjust_signal_pc Richard Henderson
2021-11-02 11:06 ` [PULL 02/60] accel/tcg: Move clear_helper_retaddr to cpu loop Richard Henderson
2021-11-02 11:06 ` [PULL 03/60] accel/tcg: Split out handle_sigsegv_accerr_write Richard Henderson
2021-11-02 11:06 ` [PULL 04/60] accel/tcg: Fold cpu_exit_tb_from_sighandler into caller Richard Henderson
2021-11-02 11:06 ` [PULL 05/60] configure: Merge riscv32 and riscv64 host architectures Richard Henderson
2021-11-02 11:06 ` [PULL 06/60] linux-user: Reorg handling for SIGSEGV Richard Henderson
2021-11-02 11:06 ` [PULL 07/60] linux-user/host/x86: Populate host_signal.h Richard Henderson
2021-11-02 11:06 ` [PULL 08/60] linux-user/host/ppc: " Richard Henderson
2021-11-02 11:06 ` [PULL 09/60] linux-user/host/alpha: " Richard Henderson
2021-11-02 11:06 ` [PULL 10/60] linux-user/host/sparc: " Richard Henderson
2021-11-02 11:06 ` [PULL 11/60] linux-user/host/arm: " Richard Henderson
2021-11-02 11:06 ` [PULL 12/60] linux-user/host/aarch64: " Richard Henderson
2021-11-02 11:06 ` [PULL 13/60] linux-user/host/s390: " Richard Henderson
2021-11-02 11:06 ` [PULL 14/60] linux-user/host/mips: " Richard Henderson
2021-11-02 11:06 ` [PULL 15/60] linux-user/host/riscv: " Richard Henderson
2021-11-02 11:06 ` [PULL 16/60] target/arm: Fixup comment re handle_cpu_signal Richard Henderson
2021-11-02 11:06 ` [PULL 17/60] linux-user/host/riscv: Improve host_signal_write Richard Henderson
2021-11-02 11:06 ` [PULL 18/60] linux-user/signal: Drop HOST_SIGNAL_PLACEHOLDER Richard Henderson
2021-11-02 11:06 ` [PULL 19/60] hw/core: Add TCGCPUOps.record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 20/60] linux-user: Add cpu_loop_exit_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 21/60] target/alpha: Implement alpha_cpu_record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 22/60] target/arm: Use cpu_loop_exit_sigsegv for mte tag lookup Richard Henderson
2021-11-02 11:07 ` [PULL 23/60] target/arm: Implement arm_cpu_record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 24/60] target/cris: Make cris_cpu_tlb_fill sysemu only Richard Henderson
2021-11-02 11:07 ` [PULL 25/60] target/hexagon: Remove hexagon_cpu_tlb_fill Richard Henderson
2021-11-02 11:07 ` [PULL 26/60] target/hppa: Make hppa_cpu_tlb_fill sysemu only Richard Henderson
2021-11-02 11:07 ` [PULL 27/60] target/i386: Implement x86_cpu_record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 28/60] target/m68k: Make m68k_cpu_tlb_fill sysemu only Richard Henderson
2021-11-02 11:07 ` [PULL 29/60] target/microblaze: Make mb_cpu_tlb_fill " Richard Henderson
2021-11-02 11:07 ` [PULL 30/60] target/mips: Make mips_cpu_tlb_fill " Richard Henderson
2021-11-02 11:07 ` [PULL 31/60] target/nios2: Implement nios2_cpu_record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 32/60] linux-user/openrisc: Abort for EXCP_RANGE, EXCP_FPE Richard Henderson
2021-11-02 11:07 ` [PULL 33/60] target/openrisc: Make openrisc_cpu_tlb_fill sysemu only Richard Henderson
2021-11-02 11:07 ` [PULL 34/60] target/ppc: Implement ppc_cpu_record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 35/60] target/riscv: Make riscv_cpu_tlb_fill sysemu only Richard Henderson
2021-11-02 11:07 ` [PULL 36/60] target/s390x: Use probe_access_flags in s390_probe_access Richard Henderson
2021-11-02 11:07 ` [PULL 37/60] target/s390x: Implement s390_cpu_record_sigsegv Richard Henderson
2021-11-02 11:07 ` [PULL 38/60] target/sh4: Make sh4_cpu_tlb_fill sysemu only Richard Henderson
2021-11-02 11:07 ` [PULL 39/60] target/sparc: Make sparc_cpu_tlb_fill " Richard Henderson
2021-11-02 11:07 ` [PULL 40/60] target/xtensa: Make xtensa_cpu_tlb_fill " Richard Henderson
2021-11-02 11:07 ` [PULL 41/60] accel/tcg: Restrict TCGCPUOps::tlb_fill() to sysemu Richard Henderson
2021-11-02 11:07 ` [PULL 42/60] hw/core: Add TCGCPUOps.record_sigbus Richard Henderson
2021-11-02 11:07 ` [PULL 43/60] linux-user: Add cpu_loop_exit_sigbus Richard Henderson
2021-11-02 11:07 ` [PULL 44/60] target/alpha: Implement alpha_cpu_record_sigbus Richard Henderson
2021-11-02 11:07 ` [PULL 45/60] target/arm: Implement arm_cpu_record_sigbus Richard Henderson
2021-11-02 11:07 ` [PULL 46/60] linux-user/hppa: Remove EXCP_UNALIGN handling Richard Henderson
2021-11-02 11:07 ` [PULL 47/60] target/microblaze: Do not set MO_ALIGN for user-only Richard Henderson
2021-11-02 11:07 ` [PULL 48/60] target/ppc: Move SPR_DSISR setting to powerpc_excp Richard Henderson
2021-11-02 11:07 ` [PULL 49/60] target/ppc: Set fault address in ppc_cpu_do_unaligned_access Richard Henderson
2021-11-02 11:07 ` [PULL 50/60] target/ppc: Restrict ppc_cpu_do_unaligned_access to sysemu Richard Henderson
2021-11-02 11:07 ` [PULL 51/60] linux-user/ppc: Remove POWERPC_EXCP_ALIGN handling Richard Henderson
2021-11-02 11:07 ` [PULL 52/60] target/s390x: Implement s390x_cpu_record_sigbus Richard Henderson
2021-11-02 11:07 ` [PULL 53/60] target/sh4: Set fault address in superh_cpu_do_unaligned_access Richard Henderson
2021-11-02 11:07 ` Richard Henderson [this message]
2021-11-02 11:07 ` [PULL 55/60] target/sparc: Split out build_sfsr Richard Henderson
2021-11-02 11:07 ` [PULL 56/60] target/sparc: Set fault address in sparc_cpu_do_unaligned_access Richard Henderson
2021-11-02 11:07 ` [PULL 57/60] accel/tcg: Report unaligned atomics for user-only Richard Henderson
2021-11-02 11:07 ` [PULL 58/60] accel/tcg: Report unaligned load/store " Richard Henderson
2021-11-02 11:07 ` [PULL 59/60] tcg: Add helper_unaligned_{ld,st} for user-only sigbus Richard Henderson
2021-11-02 11:07 ` [PULL 60/60] linux-user: Handle BUS_ADRALN in host_signal_handler Richard Henderson
2021-11-02 19:11 ` [PULL 00/60] accel/tcg patch queue Richard Henderson
2021-11-02 23:27 ` Warner Losh
2021-11-02 23:35 ` Richard Henderson
2021-11-02 23:37 ` Warner Losh
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