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From: Warner Losh <imp@bsdimp.com>
To: qemu-devel@nongnu.org
Cc: "Stacey Son" <sson@FreeBSD.org>,
	qemu-trivial@nongnu.org, "Kyle Evans" <kevans@FreeBSD.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Philippe Mathieu-Daude" <f4bug@amsat.org>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Michael Tokarev" <mjt@tls.msk.ru>,
	"Mikaël Urankar" <mikael.urankar@gmail.com>,
	"Warner Losh" <imp@bsdimp.com>
Subject: [PATCH v2 08/30] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
Date: Tue,  2 Nov 2021 16:52:26 -0600	[thread overview]
Message-ID: <20211102225248.52999-9-imp@bsdimp.com> (raw)
In-Reply-To: <20211102225248.52999-1-imp@bsdimp.com>

Implement EXCP_UDEF, EXCP_DEBUG, EXCP_INTERRUPT, EXCP_ATOMIC and
EXCP_YIELD. The first two generate a signal to the emulated
binary. EXCP_ATOMIC handles atomic operations. The remainder are fancy
nops.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Mikaël Urankar <mikael.urankar@gmail.com>
Signed-off-by: Kyle Evans <kevans@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
 bsd-user/arm/target_arch_cpu.h | 58 ++++++++++++++++++++++++++++++++++
 1 file changed, 58 insertions(+)

diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h
index 2484bdc2f7..609b78b4e2 100644
--- a/bsd-user/arm/target_arch_cpu.h
+++ b/bsd-user/arm/target_arch_cpu.h
@@ -48,6 +48,64 @@ static inline void target_cpu_loop(CPUARMState *env)
         cpu_exec_end(cs);
         process_queued_cpu_work(cs);
         switch (trapnr) {
+        case EXCP_UDEF:
+            {
+                /* See arm/arm/undefined.c undefinedinstruction(); */
+                info.si_addr = env->regs[15];
+
+                /*
+                 * Make sure the PC is correctly aligned. (It should
+                 * be.)
+                 */
+                if ((info.si_addr & 3) != 0) {
+                    info.si_signo = TARGET_SIGILL;
+                    info.si_errno = 0;
+                    info.si_code = TARGET_ILL_ILLADR;
+                    queue_signal(env, info.si_signo, &info);
+                } else {
+                    int rc = 0;
+#ifdef NOT_YET
+                    uint32_t opcode;
+
+                    /*
+                     * Get the opcode.
+                     *
+                     * FIXME - what to do if get_user() fails?
+                     */
+                    get_user_u32(opcode, env->regs[15]);
+
+                    /* Check the opcode with CP handlers we may have. */
+                    rc = EmulateAll(opcode, &ts->fpa, env);
+#endif /* NOT_YET */
+                    if (rc == 0) {
+                        /* illegal instruction */
+                        info.si_signo = TARGET_SIGILL;
+                        info.si_errno = 0;
+                        info.si_code = TARGET_ILL_ILLOPC;
+                        queue_signal(env, info.si_signo, &info);
+                    }
+                }
+            }
+            break;
+        case EXCP_INTERRUPT:
+            /* just indicate that signals should be handled asap */
+            break;
+        case EXCP_DEBUG:
+            {
+
+                info.si_signo = TARGET_SIGTRAP;
+                info.si_errno = 0;
+                info.si_code = TARGET_TRAP_BRKPT;
+                info.si_addr = env->exception.vaddress;
+                queue_signal(env, info.si_signo, &info);
+            }
+            break;
+        case EXCP_ATOMIC:
+            cpu_exec_step_atomic(cs);
+            break;
+        case EXCP_YIELD:
+            /* nothing to do here for user-mode, just resume guest code */
+            break;
         default:
             fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
                     trapnr);
-- 
2.33.0



  parent reply	other threads:[~2021-11-02 23:06 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-02 22:52 [PATCH v2 00/30] bsd-user: arm (32-bit) support Warner Losh
2021-11-02 22:52 ` [PATCH v2 01/30] bsd-user: Add stubs for new signal routines Warner Losh
2021-11-02 23:37   ` Richard Henderson
2021-11-02 23:41     ` Warner Losh
2021-11-02 22:52 ` [PATCH v2 02/30] bsd-user/arm/target_arch_sysarch.h: Use consistent include guards Warner Losh
2021-11-02 22:52 ` [PATCH v2 03/30] bsd-user/arm/target_syscall.h: Add copyright and update name Warner Losh
2021-11-02 22:52 ` [PATCH v2 04/30] bsd-user/arm/target_arch_cpu.c: Target specific TLS routines Warner Losh
2021-11-02 22:52 ` [PATCH v2 05/30] bsd-user/arm/target_arch_cpu.h: CPU Loop definitions Warner Losh
2021-11-03  3:09   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 06/30] bsd-user/arm/target_arch_cpu.h: Implement target_cpu_clone_regs Warner Losh
2021-11-02 22:52 ` [PATCH v2 07/30] bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation Warner Losh
2021-11-02 22:52 ` Warner Losh [this message]
2021-11-03  3:17   ` [PATCH v2 08/30] bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions Richard Henderson
2021-11-03 16:27     ` Warner Losh
2021-11-02 22:52 ` [PATCH v2 09/30] bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions Warner Losh
2021-11-02 22:52 ` [PATCH v2 10/30] bsd-user/arm/target_arch_cpu.h: Implement system call dispatch Warner Losh
2021-11-02 22:52 ` [PATCH v2 11/30] bsd-user/arm/target_arch_reg.h: Implement core dump register copying Warner Losh
2021-11-02 22:52 ` [PATCH v2 12/30] bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space Warner Losh
2021-11-02 22:52 ` [PATCH v2 13/30] bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm Warner Losh
2021-11-02 22:52 ` [PATCH v2 14/30] bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread Warner Losh
2021-11-03  3:31   ` Richard Henderson
2021-11-03 18:27     ` Warner Losh
2021-11-02 22:52 ` [PATCH v2 15/30] bsd-user/arm/target_arch_elf.h: arm defines for ELF Warner Losh
2021-11-02 22:52 ` [PATCH v2 16/30] bsd-user/arm/target_arch_elf.h: arm get hwcap Warner Losh
2021-11-02 22:52 ` [PATCH v2 17/30] bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl Warner Losh
2021-11-02 22:52 ` [PATCH v2 18/30] bsd-user/freebsd: Create common target_os_ucontext.h file Warner Losh
2021-11-03  3:32   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 19/30] bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack Warner Losh
2021-11-02 22:52 ` [PATCH v2 20/30] bsd-user/arm/target_arch_signal.h: arm machine context for signals Warner Losh
2021-11-03  3:33   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 21/30] bsd-user/arm/target_arch_signal.h: arm user context and trapframe " Warner Losh
2021-11-03  3:34   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 22/30] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args Warner Losh
2021-11-03  3:37   ` Richard Henderson
2021-11-03 19:14     ` Warner Losh
2021-11-02 22:52 ` [PATCH v2 23/30] bsd-user/arm/target_arch_signal.h: arm get_mcontext Warner Losh
2021-11-02 22:52 ` [PATCH v2 24/30] bsd-user/arm/target_arch_signal.h: arm set_mcontext Warner Losh
2021-11-03  3:40   ` Richard Henderson
2021-11-03 19:19     ` Warner Losh
2021-11-02 22:52 ` [PATCH v2 25/30] bsd-user/arm/target_arch_signal.h: arm get_ucontext_sigreturn Warner Losh
2021-11-03  3:47   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 26/30] bsd-user: add arm target build Warner Losh
2021-11-03  3:47   ` Richard Henderson
2021-11-03 19:22     ` Warner Losh
2021-11-02 22:52 ` [PATCH v2 27/30] bsd-user/i386/target_arch_signal.h: Remove target_sigcontext Warner Losh
2021-11-03  3:48   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 28/30] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
2021-11-03  3:48   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 29/30] bsd-user/i386/target_arch_signal.h: use new target_os_ucontext.h Warner Losh
2021-11-03  3:48   ` Richard Henderson
2021-11-02 22:52 ` [PATCH v2 30/30] bsd-user/x86_64/target_arch_signal.h: " Warner Losh
2021-11-03  3:49   ` Richard Henderson

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